Design of low-power DSP systems

Abstract

Reduction in power consumption is an important issue in both portable and non-portable systems. The dominant source of power consumption is dependent on switching activity, capacitance, supply voltage, and operating frequency. This thesis presents techniques for the analysis and estimation of these sources of power consumption in digital signal processing (DSP) systems.

First, a versatile CAD tool called HEAT (Hierarchical Energy Analysis Tool) is developed for power estimation of DSP systems. This tool is very general and can be used to estimate power of all digital architectures. This tool is very useful as it is impossible to use existing circuit simulation tools like SPICE to estimate power of large digital circuits because of time and memory complexities. The tool is found to be accurate within 10% of the results from SPICE while being orders of magnitude faster.

The bounds on power consumption are useful in determining the nature of heat sinks, the amount of batteries, etc., in both non-portable and portable DSP systems. The bounds for adders and multipliers which form the backbone of DSP systems are presented in this thesis. The analysis of bounds on carry-propagate adders reveals that the average carry chain length is 2 for large word-lengths. It is shown that as the degree of pipelining is increased the upper bound approaches the lower bound in both adders and multipliers.

Analytical expressions are presented to determine the switching activity factor at both the bit-level and at the word-level. A general expression for the switching activity of an arbitrary digital circuit in the presence of glitching and correlation is presented. It is shown that the average error between the measured and experimental values is about 5%.

Digit-serial DSP architectures are ideal for moderate speed applications. A novel transformation approach is presented which enables the direct design of low-power digit-serial multipliers. These multipliers can be pipelined to the bit-level and are thereby capable of achieving arbitrary high speeds. The extra speed can be traded with reduction in supply voltage to achieve 5-15 times reduction in power consumption.