Content area
Full Text
The proposed circuit demodulates 16-QAM I/Q signals over a Gaussian channel into log-likelihood ratios (LLRs). The input signals are converted using differential pairs into currents which are suitably added/subtracted to produce the values of the LLRs. These data can then be used as input by soft-input/soft-output channel decoders, either digital or analogue, such as turbo decoders. The circuit is designed for a 0.25 µm BiCMOS process. Transistor level simulations validate the correct functioning of the circuit.
Introduction: Quadrature amplitude modulation (QAM) is a common type of modulation scheme in digital communication receivers. When hard decoding is used, the noisy downconverted I=Q signalisfedtoa bank of comparators (four in the case of 16-QAM modulation) and compared to some suitable reference voltages to translate the analogue information into bits. It means that a decision on the value of the bit has been taken before the channel decoding takes place. Powerful types of decoder (such as the turbo decoder) work, however, with continuous input values representing a reliability on the estimate of the bit value. The reliability is represented by a quantity known as the log-likelihood ratio (LLR). This type of decoder requires thus a specific circuit to extract the values of the LLRs from the I=Q signals for each bit constituting a point in the QAM constellation. If the decoder is digital, the LLRs are obtained in a digital way implying the use of analogue-to-digital converters (ADC) which are power-hungry and costly in terms of occupied silicon area. Recently, it has been shown that using an analogue decoder could lead...