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An ultra-low-noise, DC-1 MHz, current preamplifier is presented featuring a matched double-MOS architecture around a low offset opamp to obtain bidirectional gain with a signal range from -40 to 30nA. Current noise density reaches a value of 500αA/ [radical]Hz, equivalent to a 100GΩ resistor, giving a 1 pA^sub RMS^ noise in a 100 kHz band. The strictly equal operating point of all transistors ensures excellent linearity even at femtoAmpere input current.
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Introduction: A low-noise wideband current preamplifier is the fundamental input stage in those on-chip systems devoted to high resolution measuring applications. Detection of single molecules using nanopores [1], electrical characterisation of nanosamples by means of current-sensing atomic force microscopes [2] or electrical read-out of quantum bits [3] are examples where the nanometric size of the sample produces extremely low current signals and consequently tight requirements to the instrumentation. For these highly critical purposes the preamplifier should feature a very low capacitance at the input node to limit high frequency noise and to allow measurements of fast changing signals (high bandwidth), a continuous-time tracking capability of the input current (DC amplification), the necessary high gain over a wide signal range down to zero current. All these competing requirements are not fully addressed by the available switched amplifiers, lacking of continuous time measurements [4], or by mirror-like architectures, lacking the possibility to work at zero bias [5], We present a CMOS current preamplifier specifically conceived to address all these points.
Amplifier design: The core of the proposed current amplifier is the matched double-MOS structure shown in the dashed box of Fig. la. Since the four transistors (Mnl, Mpl, Mp2, Mn2) have the same gatesource voltages and the same gate-drain voltages, the couples Mni"Mn2 and Mpl-Mp2 always work in the same operating point. Mn2 and Mp2 are composed by N replicas of Mnl and Mp j transistors, respectively, operating in parallel to give an output current amplified by a factor N irrespective of the transistor nonlinear voltage-current characteristic curves and of any geometrical dependence of the transistor parameters. This double-MOS scheme, derived from the reset networks used in charge preamplifiers [6], ensures bidirectional current amplification by a factor N and extends the capabilities to...