Content area

Abstract

This research presents the design and initial implementation of a database engine using an Intel Xeon Phi co-processor. The many integrated cores (MIC) of the Xeon Phi make this hardware accelerator a natural computing platform for an in-memory database engine or server. The database tables reside in the memory space of the MIC thus supporting fast in-memory database applications. This achieved by developing a coalescing parallel memory manager to allocate parallel variables in the same manner that fields are created in a table using a SQL CREATE TABLE command. The SQL interface was created using a database driver toolkit that provides an interface to the Xeon Phi server and client application. Once the basic framework was established, the algorithms for SQL select, insert, update, delete, and join were created to manipulate database information in the memory of the Xeon Phi.

Details

Identifier / keyword
Title
Design of an In-Memory Database Engine Using Intel Xeon Phi Coprocessors
Pages
1-7
Number of pages
7
Publication year
2014
Publication date
2014
Publisher
The Steering Committee of The World Congress in Computer Science, Computer Engineering and Applied Computing (WorldComp)
Place of publication
Athens
Country of publication
United States
Publication subject
Source type
Conference Paper
Language of publication
English
Document type
Feature
ProQuest document ID
1649687837
Document URL
https://www.proquest.com/conference-papers-proceedings/design-memory-database-engine-using-intel-xeon/docview/1649687837/se-2?accountid=208611
Copyright
Copyright The Steering Committee of The World Congress in Computer Science, Computer Engineering and Applied Computing (WorldComp) 2014
Last updated
2024-08-27
Database
ProQuest One Academic