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Vertical-migration microprocessor architecture, which enables efficient mapping of high-level language (HLL) programs into microcode, is analyzed. This mapping is provided only for selected types of HLL statements and for HLL statements with a relatively small number of operands and parameters. Using an extended subset of Fortran 77, which matches the typical demands of the targeted application (dedicated microprocessing), it is shown how the proposed architecture supports the mapping of HLL constructs into microinstructions. This is accomplished through the description of a flexible register-transfer level simulator, used to run benchmarks that are typical of various applications on various configurations of the architecture. The study shows that this approach is particularly suitable for the time-critical dedicated signal processing and robotics/control applications, as well as for the gallium arsenide (GaAs) implementation. Simulation results indicate that performance of this architecture depends directly on the number of processing elements. Illustrations.