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A competent simulator may help engineers exercise sound EMC judgment
The efforts of design analysis, signal integrity, PCB layout and EMC analysis should be integrated into a design discipline that yields a much higher level of EMC compliance the first time a product is tested, without design overkill.
Today's Development Model
Today's system development model consists of:
1. Defining the system marketing wants to build.
2. Determining the architecture and technologies to use to build the system.
3. Designing the system with some good general EMC guidelines.
4. Building and testing a prototype.
5. Fixing the EMC failures (re-spins of PCBs, modifications of cabinets, adding ferrites to cables, etc.)
6. Building the second iteration system and retesting for EMC.
7. Shipping the systems if EMC passes; returning to step five and repeating the process if it does not.
Sound familiar? When steps 1 and 2 of the above process have been complete, questions may still remain. For example:
How much radiation will come off of the heat sinks?
How near the air vents can the CPU be put and still remain in compliance?
What size air vents are allowed in the enclosure?
Is an unshielded enclosure a concern?
Are unshielded cables a concern?
How can PCB radiation be controlled?
None of these questions can be answered with any certainty prior to building the system because the old EMC formulas are for items in free space; here, we are dealing with items that influence one another. With EMC simulation and modeling tools, these questions can be answered during the development cycle.
Experience (failure to meet EMC standards) has provided some good EMC design guidelines:
Use multilayer ground and voltage planes where possible.
Use a smart PCB stackup such as ground plane, signal layer, voltage plane, etc.
Keep slots from breaking up voltage and ground planes and producing EMC hot spots.
Keep trace lengths as short as possible.
Place the higher speed circuits as far away from the I/O circuitry as possible.
Look closely at clock distribution. Don't run high frequency clocks all over the system. If things must run synchronously, distribute a lower frequency clock and use PLL clock chips to recover the higher frequency clock.
Reduce or eliminate PCB edge radiation with a...