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By Mitch Dale, IKOS, Cupertino, CA
Today, the solution to the design complexity-verification problem, rests with a mixture of hardware and software platforms. Design verification has moved from interfaces that sychronise with events, to those that are clock cycle synchronous onto `transaction' co- modelling based solutions, where the interface communications are raised to a high level of abstraction. Here, a Transaction Portal is described against the background of the earlier, slower interface options.
As System-on-Chip (SoC) complexity increases, traditional methods of verification using HDL software simulators prove to be insufficient.They do not provide the verification power needed to check for correct system functionality, ensure high quality and gain confidence for first time working silicon. In addition, the verification of complex SOC devices now requires modelling the entire system and running enough real world situations to verify that the whole system works, as well as the chip.These factors present the need for a flexible modelling environment that can run at very high speeds, at least 1000 times faster than current software simulators, in order to process a meaningful number of system level options. A flexible, high-speed modelling environment allows the designer to develop real world test cases from high-level system models, captured live data, and interaction between system level interfaces. Built upon a unique interface technology, the IKOS Transaction Interface Portal to be discussed here provides a high-speed link between software at the abstract level and the detailed hardware implementation. This high speed, flexible interface along with the IKOS VStation, see Figure 1, enables the user to run mission software, verify system-level operation and quickly find and debug design problems.
Enabling co-modelling through TIP
Co-verification is the use of multiple interconnected platforms that form a unified verification environment. In the co-verification environment, parts of the design and testbench are partitioned onto each of the platforms and run in concert. Several specific types of co-verification exist today.
Co-simulation
Co-simulation is currently the most common form of co- verification. Co-simulation integrates an HDL software simulator with a high speed hardware platform for accelerated HDL simulation. The HDL software simulator runs on the host workstation, transferring data and synchronising with the hardware platform at each event exchange on the interface. Performance of Co-simulation solutions are limited by the...