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Phase-locked dielectric resonator oscillators (DRO) are essential components in high frequency microwave links where phase noise is a crucial parameter. The main advantage of a phase-locked DRO (PLDRO) source over an ordinary synthesizer is its phase noise characteristic. This is due to the voltage-tuned DRO's (Vt-DRO) high quality factor tank circuit (a dielectric resonator) on one hand, and direct locking to a high frequency reference harmonic by means of a microwave sampling phase detector (SPD) on the other. In this way, the noise floor contribution of prescalers and frequency dividers used in an ordinary synthesized frequency generator is avoided within the loop band. In addition, the free-running phase noise characteristic of the Vt-DRO gives the advantage of low phase noise performance outside the loop bandwidth at high offset frequencies. This characteristic is most evident with GaAsFET DROs, where the free-running phase noise spectrum rolls off at a -30 dB per decade rate. Furthermore, the possibility of wideband phase locking of the Vt-DRO provides good short-term stability (for instance, low microphonicity) for this frequency source. However, unlike a standard synthesizer, a PLDRO requires a special frequency acquisition and locking technique for correct and reliable operation. In this article, phase noise considerations, a loop optimization procedure and a specific acquisition technique for PLDROs are explained.
ACQUSITION CIRCUIT REQUIREMENTS
Sweeping Range Considerations
Frequency acquisition can be accomplished by sweeping the Vt-DRO, as shown in the block diagram in Figure 1. The SPD driven by the reference signal generates a comblike spectrum. At the instant the Vt-DRO frequency coincides with the reference signal's desired harmonic, the loop will acquire a stable lock and will remained locked as long as the search signal is not too fast or large. The frequency spacing between each comb harmonic is equal to the temperature-compensated crystal oscillator's (TCXO) frequency as defined in
For a symmetrical search, the optimum V^sub tune^ value of the Vt-DRO (that is, the value at which the desired phase-locked oscillator frequency is reached) should be half of the control voltage swing range (for instance, 1/2 V^sub cc^, where V^sub cc^ is the supply voltage to the active loop filter). This value can be easily obtained by mechanically tuning the Vt-DRO tuning screw. In the same way, the search signal...