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Abstract

Evans & Sutherland Computer Corp. (Salt Lake City, Utah) has introduced a 3-dimensional graphics/imaging subsystem with photographic-quality output. The subsystem determines the color of each object, decides which portions of which objects are visible, and then computes the final pixel value for the output to produce a 1,024-pixel-square color image, with a wide variety of shading effects, in only a few seconds. An ASIC filter chip, code-named Pharaoh in honor of its pyramid-shaped algorithm, is integral to this subsystem. Pharaoh implements a general filtering algorithm, allowing it to compute the color of each pixel in an image based on a weighted summation of neighboring pixels. The overall graphics subsystem computes a raster image from a set of 3D polygons, which are derived from a mathematical model describing the surface of an object and the object's approximate shape. The final verification stage of the Pharaoh design consisted of design rule checking, extraction, netlist comparison, and back-annotated simulation. Pharaoh's development illustrates the feasibility of one person designing a 75,000-gate chip within 10 weeks of finalizing the algorithm and LISP model, using today's design tools and compiler technology.

Details

10000008
Company / organization
Title
Pharaoh Chip Compiler: 10-Week Wrap-Up
Publication title
ESD: The Electronic system Design magazine; Boston
Volume
18
Issue
11
Pages
48
Number of pages
5
Publication year
1988
Publication date
Nov 1988
Publisher
Digital Design Publishing
Place of publication
Boston
Country of publication
United States
ISSN
08932565
Source type
Trade Journal
Language of publication
English
Document type
PERIODICAL
Accession number
00430603
ProQuest document ID
209598345
Document URL
https://www.proquest.com/trade-journals/pharaoh-chip-compiler-10-week-wrap-up/docview/209598345/se-2?accountid=208611
Copyright
Copyright Digital Design Publishing Nov 1988
Last updated
2024-08-25
Database
ProQuest One Academic