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The hardware and software design strategy for a high-speed multiprocessor network simulator is presented. When complete, the simulator is expected to provide high-speed, low-cost simulations for realistic network modeling and convenient sensitivity analysis. The simulator employs configured arrays of transputers to create a multiprocessor environment for the modeling of circuit and packet switched networks, taking advantage of the transputer's unique features for parallel implementation of such models. The models are written in OCCAM. Based on the communicating sequential processes, OCCAM allows code to be separated into independent groups, communicating with each other through point-to-point channels. This permits concurrent execution of these groups with synchronization and data transfer using the channels between them.