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Simulation is a key element in modern and future digital circuit design. However, simulation becomes a bottleneck in digital circuit design with increasing design complexity. Two basic solutions exist: 1. reduction of the simulation load through multilevel simulation, and 2. acceleration of the simulation through exploitation of parallelism on the different modeling and simulator levels. The new Parallel Multi-Level VLSI Simulator (PMLS) developed for general-purpose parallel machines combines multileveling and exploitation of parallelism at the circuit level. The PMLS initially has been implemented in the object-oriented language POOL for the parallel DOOM machine. Researchers currently are working on advanced features for PMLS such as zooming, dynamic change of the circuit structure, and incremental simulation, as well as on tuning the simulator. Very large-scale integration (VLSI) simulation is a promising application of parallel general-purpose machines like DOOM.