Content area
Full Text
J. Liu: IVF -- The Swedish Institute of Production Engineering Research, Moolndal, Sweden,
K. Boustedt: IVF -- The Swedish Institute of Production Engineering Research, Moolndal, Swedenand
Z. Lai: IVF -- The Swedish Institute of Production Engineering Research, Moolndal, Sweden
ACKNOWLEDGMENT: *Thispaper was presented at the Surface Mount International Conference held at San Jose, CA, in August1995.
1
INTRODUCTION
It is becoming clear that signal delays in ICs are decreasing further and packaging technology will be the bottleneck for future electronics manufacturing. Therefore it is extremely important to develop advanced flip-chip technologies which offer the highest performance in terms of signal transmission, packaging density etc.1
Flip-chip technology has been used for decades in electronics manufacturing. The well-known C4 process from IBM has been proven to be the only electronic manufacturing process which fulfils the six sigma criteria.2
The interest in flip-chip technology has been growing considerably during the past few years as result of further decrease in signal delays in IC technology.
Although flip-chip technology is considered very promising in MCM-D (deposited) and MCM-C (ceramic) substrates, the relatively high substrate cost in these technologies renders them undesirable for a wider application in electronics. Flip-chip technology in MCM-L (laminated) applications offers the potential for a low-cost, high electrical performance process. However, due to the large difference in coefficients of thermal expansion between the solder bumps and the laminates (normally FR-4 materials), the reliability of such an electronic system is questioned especially in applications involving severe environmental conditions unless underfilling is use.3 New printed circuit boards with low thermal coefficients may also be interesting for solving this problem.4
Flip-chip interconnection using conductive adhesives offers another possibility of dealing with this issue.5 Many conductive adhesives have been tailored for flip-chip applications. Anisotropically conductive adhesives have already been tested for flip-chip applications.6,7 New unrandomly arrayed anisotropically conductive adhesives for flip-chip assembly have already been reported.8
In this paper, the driving forces for flip-chip using conductive adhesive joining and soldering technology will be described. Test board design and process specifications will be discussed. Flip-chip bonding processes used in the present work will be described. Preliminary reliability testing results will also be given.
Future research directions in flip-chip joining using eutectic solder and conductive adhesives on flexible circuits will also be given.