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TransEDA's Assertain is billed as a "verification closure-management tool." But it's also a way to derive metrics that can tell users when their verification process is truly complete. Assertain monitors, measures, and manages the verification process in one integrated environment.
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With so many ASIC designers moving over to FPGAs for implementation, FPGA tool flows are looking more and more like ASICflows. case in point: Actel's Libero IDE 6.2 adds native static timing analysis (STA), among other improvements, to an already ASIC-like FPGA design flow.
In version 6.2 of Actel's Libero integrated FPGA design environment, a new native static-timing-analysis view is tightly integrated with the tool's constraints editor.
The SmartTime STA environments support the growing complexity of today's FPGAs. In its timing analysis view, it graphically displays all of the design's clock domains and lets users add constraints and perform analysis (see the figure). Clock domains easily can be added or subtracted. The timing-analysis view is tightly integrated to a constraints editor. Many changes can be made in the timing-analysis view, and the constraints view is automatically updated.
In the constraints-editor view, timing requirements and exceptions can be edited with easy to use "visual dialogs," which guide users toward capturing constraints quickly and correctly. These views are tightly integrated to the timing-analysis view as well, allowing users to quickly see the impact of changes.
For Actel's recently introduced ProASIC 3 family of logic devices, the Libero environment now performs automatic clock assignment of up to 18 clocks. It automatically determines the clock networks and large-fanout networks, placing the nets with appropriate drivers.
Also, v.6.2 of the Libero environment offers free access to Mentor's ModelSim AE (Actel Edition) simulator in the Libero Gold edition. The Libero v6.2 integrated design environment comes in a Platinum edition for Unix ($4995) and Windows ($2495) as well as in a free Gold edition for Windows. The Platinum edition handles unlimited device sizes and contains physical synthesis capabilities from Magma Design Automation.
Actel Corp.
www.acfe/.com ED Online 10743
Verification Closure Tool Watches Over Assertions
While assertions and assertion-based verification (ABV) help solve many problems, they also spawn new challenges. How do you write them? Did they cover the entire design? And when is verification complete?
TransEDA's Assertain is billed as a "verification closure-management tool." But it's also a way to derive metrics that can tell users when their verification process is truly complete. Assertain monitors, measures, and manages the verification process in one integrated environment. It brings together rule, protocol, and assertion checking; code and assertion coverage; design and assertion coverability analysis; and test grading and optimization, which is linked to specification coverage.
The tool, which fits seamlessly into established verification flows, uses comprehensive assertion-coverage metrics such as structural, step, and variable coverage. Cross-linked results from assertion coverage and code coverage are combined in a unified database that provides a clear view of verification progress.
In addition, TransEDA's formal engine augments the tool's integrated rule-checking engine with formal verification of design-consistency rules, such as bus contention and high-impedance conditions, finite-statemachine deadlock and livelock, array out-of-bounds, and others.
Available on Solaris and Linux platforms, Assertain starts from $30,000 for a perpetual license.
TransEDA * tvvvw.transeda.com EO Online 10744
EDA ROUNDUP
* 3D PLANAR ELECTROMAGNETIC MODELING AND ANALYSIS now comes in a 64-bit version with Agilent EEsof's latest edition of Momentum. With this version, users can see significantly improved accuracy, capacity, and speed for design and verification of passive components and interconnects in RFIC, MMIC, and pc-board/hybrid/module projects. The 64-bit capability eliminates memory limitations and cuts EM simulation and verification time in half. The new version of Momentum, integrated into both the ADS 2005A and RFDE 2005A analog/RF design environments, will be available in September. Prices for ADS and RFDE begin at around $8000 and $16,000, respectively. Visit www.agilent.com/find/eesoffor more information.
* A STREAMING COPROCESSOR CAPABILITY has been added to CriticalBlue's Cascade coprocessor-synthesis design environment. Streaming permits autonomous transfer of data into and out of the coprocessor with minimum main CPU interaction, freeing the CPU to execute other tasks. The new capability allows designers to select an autonomous streaming-coprocessor implementation for applications in which the offloaded functions process continuous streams of data. In such cases, a streaming architecture is suited to achieving optimal system data throughput and power consumption. The new capability will be available in Cascade in the second half of 2005. For details, visit www.cr/tfca/b/ue.com. ED Online 10745
Copyright Penton Media, Inc. Jul 21, 2005