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Texas Instruments, Hewlett-Packard and Emosyn are continuing to drive ferroelectric technology with a ferroelectric capacitor that is scalable down to 0.09 micro m2, making the technology viable in CMOS manufacturing lines. Previous capacitors have been down to 0.5 and 0.8 micro micro m2.The team has used a capacitor with a planar bottom electrode built on the tungsten plugs of the metal interconnect, with sputtering deposition for the electrodes and diffusion barriers and metallo-organic chemical vapour deposition of the thin film ferroelectric material using standard CMOS manufacturing techniques.This material is lead zirconium titanium oxide, whose electric field can be polarised using low supply voltages and remain polarised until it is reset.This makes such devices ideal for applications such as smartcards. Building the capacitors on the tungsten plugs means that no extra area is taken up in the chip, again ideal for cost-sensitive smartcard market.A key result from the research is that the polarisation value, measured at the low value of 2V, scales well with size. The area-corrected value varies less than 10% as the capacitor area is reduces from 100 micro m2 to just 0.12 micro m2.Based on these results, a 0.1 micro m2 capacitor area is sufficient to provide the switched charge value of 30fC that is needed to be used with sub-micron CMOS devices. NF