Fractional-Order Approximation and Synthesis of a PID Controller for a Buck Converter

Abstract

In this paper, the approximation of a fractional-order PIDcontroller is proposed to control a DC–DC converter. The synthesis and tuning process of the non-integer PID controller is described step by step. A biquadratic approximation is used to produce a flat phase response in a band-limited frequency spectrum. The proposed method takes into consideration both robustness and desired closed-loop characteristics, keeping the tuning process simple. The transfer function of the fractional-order PID controller and its time domain representation are described and analyzed. The step response of the fractional-order PID approximation shows a faster and stable regulation capacity. The comparison between typical PID controllers and the non-integer PID controller is provided to quantify the regulation speed introduced by the fractional-order PID approximation. Numerical simulations are provided to corroborate the effectiveness of the non-integer PID controller.

1. Introduction

A power converter is a device that transforms the power supply characteristics into the ones required by a particular machine; DC–DC conversion is one of the most known applications [1]. Research into DC–DC converters involves plenty of techniques proposed to improve performance [2], efficiency [3,4] and modeling [5] or to reduce conduction losses [6], to mention a few.

Different control strategies have been proposed to enhance performance of DC–DC converters, ranging from the widely used Proportional-Integral and Proportional-Integral-Derivative controllers [7,8,9], sliding mode control [10], passivity-based control [11], fuzzy logic controllers [12,13] or poles placement [14], for instance.

In the last decade, control strategies have been explored, redesigned and adapted from the fractional calculus perspective, mainly seeking to improve the modeling accuracy and dynamic response. The main reasons behind using fractional calculus can be summarized as follows [15,16,17]:

• Lower order derivatives implies lower (reduction) levels of noise.

• Robustness against parameters variations.

• Better description of systems due to an extra degree of freedom (the fractional order).

• Fits better the frequency behavior of some systems.

• Fractional relations are realizable through ladder, trees or fractal arrangements of traditional electronic elements.

• Good description of long-term memory effects, non-locality and fractal properties of systems.

• Exact (good) approximation of systems with lumped (distributed) parameters.

• Flexibility to approximate systems with large dimensional nature.

Many remarkable results, reporting the synthesis of non-integer order controllers for power converters, have shown the effectiveness of fractional calculus in Control Theory. In [18], the non-ideal model of a DC–DC converter is controlled through an Internal Model Control strategy, which encapsulates the model of the plant within the controller, resulting in a structure resembling a PID with an extra lag network. The fractional-order controller improved the steady state performance. In [19], a fractional-order PI controller is combined with fuzzy-logic precompensators to control a Buck converter via capacitor current. The combination improved the system disturbance-rejection capability and reference tracking performance. In [20], a type-II fuzzy PID controller is proposed to handle uncertainties and external disturbances in a DC–DC converter connected to a microgrid. It minimized the instability effects in the converter, caused by the constant power loads of the microgrid. To improve the performance with respect to the varying parameters, an optimization algorithm for tuning the controller coefficients was proposed as well. A fractional-order back–stepping sliding mode controller was suggested in [21]. The controller showed robustness regulating voltage of DC–DC converters in presences of uncertainties, unmodeled dynamics and non-linear loads. Moreover, it improved the capability of perturbation rejection and reduced the steady-state error. In a similar approach, an adaptive fractional-order sliding mode control was designed for current tracking for a DC–DC converter in [22]. The adaptation rules were based on state observers and Lyapunov functions. Good transient response and robustness were the most important improvements. In [23], a fractional-order PID controller was suggested to stabilize a DC-bus voltage of a ultra-capacitor hybrid energy system. An optimization algorithm was suggested to tune the controller parameters. The steady-state response showed higher performance and better steady-state properties. In [24], a fractional-order PID controller was used to regulate the output voltage of a DC–DC converter in a photovoltaic (PV) system. The integration of incremental conductance method, maximum power point tracking and root locus technique was suggested to compute the controller parameters. This combination resulted in fast dynamics and high tracking accuracy under severe climate variations.

The above reviewed results showed that fractional-order controllers successfully achieved the control objectives and outperformed integer-order ones, yet they present two main drawbacks. On one hand, the controllers were designed by using one of the following definitions of the integro-differential operator: Grünwald–Letnikov, Riemann–Liouville or Caputo [25,26,27], which increase the computational and implementation complexity. On the other hand, the parameters of controllers were obtained by either bee swarm, ant colony, bat, flower pollination, Nelder–Mead or teacher-learning optimization algorithms, which required the control strategy to be adapted to them, increasing the computational complexity.

In this paper, a simpler procedure to approximate a fractional-order PID controller to regulate the output voltage of a DC–DC Buck converter is explored. The non-integer approach is suggested due to fractional calculus have demonstrated accuracy in modeling real systems/phenomena and robustness against parameter variations. It is proposed to approximate the controller through a method that employs a frequency approach, the result of which is a controller that exhibits a flat phase response in a band-limited frequency spectrum. The proposed method takes into consideration both robustness and desired closed-loop characteristics, keeping the tuning process simple. It is shown that the resulting structure of the controller allows obtaining its representation in the time domain, which makes it easier to analyze its effects in transient and permanent regimes.

The paper is organized as follows: Section 2 provides with the necessary preliminaries on DC–DC buck converter, i.e., its basic operation and the model description are provided. The method to be used to approximate the fractional-order PID controller is given in this section as well. In Section 3 the synthesis of the fractional-order PID controller is described step by step. The tuning process of the fractional-order PID controller and the numerical results are also provided in this section. A comparison of performance and robust stability of typical PID controllers vs the fractional-order PID controller is addressed in this section as well. In Section 4 the proposal for the possible realization of the fractional-order PID controller is described. Discussion and conclusions on the presented numerical results are provided in Section 5 and Section 6, respectively.

2. Materials and Methods

In this section preliminaries on DC–DC Buck converter and its modeling are provided. The method to approximate fractional-order Laplacian operator is also described in this section.

2.1. Buck Converter

A DC–DC converter is an electronic device that provides a variable, but continuous source of voltage from a fixed power supply. The Buck configuration, whose main characteristic is to produce an average output voltage lower than the power supply, is mainly applied as regulated source of power or to control velocity of DC motors.

The electrical diagram of a Buck converter is shown in Figure 1a, whose basic elements are: a DC voltage source $V_g$, a capacitor C, an inductance L, a resistor R and two complementary switches $S_1$ and $S_2$, i.e., when $S_1$ is on, $S_2$ is off and vice versa. Figure 1a with switches $S_1$ and $S_2$ is commonly implemented as shown in Figure 1b with G and D, respectively.

The ideal operation in continuous conduction mode (CCM) of the circuit from Figure 1a can be divided into two modes. During mode 1, $S_1$ is on and $S_2$ is off at $t=0$, current reaches the load R flowing through $S_1$ and the inductance L. The operating mode 1 is described as follows [1,28],

(1)$\begin{array}{ccc}\frac{\mathrm{d}{i}_L}{\mathrm{dt}}& =& \frac{1}{L}\left(V_g-V_c\right),\hfill \\ \frac{\mathrm{d}{v}_c}{\mathrm{dt}}& =& \frac{1}{C}\left(i_L-\frac{V_c}{R}\right).\hfill \end{array}$

During mode 2, $S_2$ is on and $S_1$ is off at $t=t_1$, the inductor current flows through $S_2$, decaying until $S_1$ is activated again. The operating mode 2 is described as follows [1,28],

(2)$\begin{array}{ccc}\frac{\mathrm{d}{i}_L}{\mathrm{dt}}& =& \frac{-V_c}{L},\hfill \\ \frac{\mathrm{d}{v}_c}{\mathrm{dt}}& =& \frac{1}{C}\left(i_L-\frac{V_c}{R}\right).\hfill \end{array}$

A continuous time–invariant linear model of Buck converter can be derived from the nonlinear time–variant circuit of the converter (1) and (2), over one period T of duty cycle D, shown in Figure 2, as follows [1,28],

(3)$\begin{array}{ccc}\frac{\mathrm{d}⟨i_L⟩}{\mathrm{dt}}& =& \frac{1}{L}\left(\overline{D}{V}_g-V_c\right),\hfill \\ \frac{\mathrm{d}⟨v_c⟩}{\mathrm{dt}}& =& \frac{1}{C}\left(i_L-\frac{V_c}{R}\right),\hfill \end{array}$

where $\overline{D}\in [0,1]$ is the average of duty cycle D. Considering that $V_c=V$ is the output of the system $y\left(t\right)$ and $\overline{D}$ is the control input $u\left(t\right)$, the transfer function of system (3) is described by,

(4)$G_p\left(s\right)=\frac{Y\left(s\right)}{U\left(s\right)}=\frac{\frac{V_g}{CL}}{s^2+\frac{1}{RC}s+\frac{1}{CL}}.$

Parameters shown in Table 1 have been used to implement a Buck converter in [29]. The converter showed good performance operating at a switching frequency $f_s=20$ kHz in continuous conduction mode for microgrids with constant power loads. By using those values, (4) exhibits the frequency response shown in Figure 3.

In the next section the approximation of the fractional-order PID controller is performed.

2.2. Fractional-Order Approximation of Laplacian Operator

In the following, the method used to approximate the Laplacian operator is summarized.

El-Khazali method uses biquadratic modules with flat phase response to approximate the integro–differential operator $s^{\pm \alpha }$, where $0<\alpha <1$. The fractional derivative operator $s^{\alpha }$ can be approximated by El-Khazali method as follows [30,31],

(5)$s^{\alpha }\approx T\left(\frac{s}{{\omega }_c}\right)=\frac{a_0{\left(\frac{s}{{\omega }_c}\right)}^2+a_1\left(\frac{s}{{\omega }_c}\right)+a_2}{a_2{\left(\frac{s}{{\omega }_c}\right)}^2+a_1\left(\frac{s}{{\omega }_c}\right)+a_0},$

where ${\omega }_c$ is the center frequency and $a_0$, $a_1$, $a_2$ are real constants defined as,

(6)$\begin{array}{ccc}{a}_0& =& {\alpha }^{\alpha }+3\alpha +2,\\ a_2& =& {\alpha }^{\alpha }-3\alpha +2,\\ a_1& =& 6\alpha \tan \frac{(2-\alpha )\pi }{4}.\end{array}$

For $a_0>a_2>0$ and $\omega ={\omega }_c=1$, $\arg \left\{T\right(j1\left)\right\}>0$, which means that (5) behaves as a fractional-order differentiator around the center frequency ${\omega }_c$ [30]. The phase flatness of (5), is guaranteed as long as [30,31]

(7)$\arg \left\{T(s/{\omega }_c){|}_{j{\omega }_c}\right\}=\pm \alpha \pi /2.$

In the following section, numerical simulation and a comparison between integer/fractional-order controllers will be shown.

3. Results

In this section, the synthesis and tuning of an approximation of a fractional-order PID controller is described. Performance results are presented through numerical simulations.

3.1. Synthesis and Tuning of Fractional-Order PID Controller

The fractional-order PI${}^{\alpha }$D${}^{\mu }$ controller is described as [32]

(8)$G_c\left(s\right)=K_p\left(1+\frac{1}{T_i{s}^{\alpha }}+T_d{s}^{\mu }\right),$

where $0<\alpha ,\mu <1$, $K_p$ is the proportional gain, $T_i$ and $T_d$ are the integral and derivative time constants, respectively. If $\alpha =\mu =1$ one obtains the integer–order PID controller, which was studied through loop shaping and optimization to find, among other characteristics, the influence of relation $T_i=\eta T_d$ in frequency design approach, where $\eta$ is a constant in order to obtain a unique solution [33,34]. By setting $\alpha =\mu$, $\eta =1$ and a slightly modification on (8) to achieve a perfect square trinomial [35], (8) becomes,

(9)$G_c\left(s\right)=\frac{K_c{(T_i{s}^{\alpha }+1)}^2}{s^{\alpha }},$

where $K_c=Kp/T_i$. With the appropriate combination of $K_c$ and $T_i$, the closed-loop system, with the open-loop transfer function $G_o=G_c{G}_p$, should exhibit the desired frequency/time response.

The relationship between the desired phase margin ${\varphi }_{md}$ and the phase of the controller–plant pair is ${\varphi }_c+{\varphi }_p=-\pi +{\varphi }_{md}$, where ${\varphi }_c$ and ${\varphi }_p$ are the controller and plant phase contribution, respectively, implying that

(10)${\varphi }_c={\varphi }_{md}-\pi -{\varphi }_p.$

If (5) is manipulated as $s^{\alpha }\approx T\left(s\right)\equiv N\left(s\right)/D\left(s\right)$ and substituted into (9), $G_c=K_c{(N\left(s\right)/D\left(s\right))}^{\pm 1}$ as $T_i\to \infty$ ($T_i\to 0$), which is the fractional-order differentiator (integrator), thus, ${\varphi }_c=\pm \alpha \pi /2$.

Therefore, by using (7) and (10) one concludes

(11)$\alpha =\frac{(-\pi -{\varphi }_p+{\varphi }_{md})}{\left(\pi /2\right)}.$

The parameters $T_i$ and $K_c$ will be computed as follows [30], aiming to obtain the starting point for the tuning process,

(12)$T_i=\left\{\frac{\tan \left(\frac{{\varphi }_c}{2}\right)+\tan \left(\frac{2+\alpha }{\pi /4}\right)}{\tan \left(\frac{{\varphi }_c}{2}\right)-\tan \left(\frac{2+\alpha }{\pi /4}\right)}\right\},$

where ${\varphi }_c\ne \left(\frac{2+\alpha }{\pi /8}\right)$ to prevent the denominator to be zero. On the other side, by solving (9) using (5), the controller gain is obtained as follows,

(13)$K_c=\frac{\frac{G_{md}}{|G_p\left(j{\omega }_{pc}\right)|}\{{(a_0-a_2)}^2+a_1^2\}}{{(a_0-a_2)}^2{(1-T_i)}^2+a_1^2{(1+T_i)}^2},$

where ${\omega }_{pc}$ is the phase crossover frequency and $|G_p\left(j{\omega }_{pc}\right)|$ must no be 0 or ∞, if so, a large value must be chosen instead [30].

In the following section, the approximation of the fractional-order controller will be computed.

3.2. Numerical Results

Consider the closed-loop diagram of Figure 4, where the plant (4) describes the transfer function of the Buck converter of Figure 1 with the component values of Table 1. The controller design comprises the following steps:

• Investigate the stability margins of the uncontrolled plant.

• Compute the fractional-order $\alpha$ of the controller.

• Determine the phase contribution of the controller $G_c$.

• Determine the integral time constant $T_i$.

• Determine the controller gain $K_c$.

• Compute open– and closed-loop transfer functions, evaluate stability and stability margins.

• If stability margins were not met, from the obtained values, slightly move up/down until the desired margins are met.

Reasonable values of phase margin for the system to exhibit acceptable robustness are suggested between 30${}^{\circ }$–60${}^{\circ }$[36]. In this particular case, it is desired the closed-loop system to exhibit a frequency response with the following margins: $G_{md}\ge 20\mathrm{dB}$ and $P_{md}={\varphi }_{md}={45}^{\circ }$.

The stability margins of the uncontrolled plant described by (4), whose frequency response is shown in Figure 3, are $G_m=\infty$ and ${\varphi }_m=0.{54}^{\circ }$. The phase margin is computed as ${\varphi }_m=\pi +{\varphi }_p$, where ${\varphi }_p=\arg \left\{G_p\left(j{\omega }_c\right)\right\}$, thus ${\varphi }_p=-179.{46}^{\circ }$.

By using (11), the corresponding fractional-order for the approximation is $\alpha =0.494$, which produces the frequency response shown in Figure 5 obtained with (5) and (6). The phase contribution of the controller ${\varphi }_c=44.{46}^{\circ }$, computed by using (10), is consistent with the phase plot of Figure 5.

The integral time constant $T_i=1.1808$ and the controller gain $K_c=0.7353$ were computed according to (12) and (13), respectively, where $|G_p|=\frac{G_{md}}{3}$ dB, since $|G_p\left(j{\omega }_{pc}\right)|\approx 0$.

The values above described do not produce the required closed-loop stability margins, since $G_m=\infty$ and ${\varphi }_m=30.4^{\circ }$. By using the obtained values of $T_i$ and $K_c$ as starting point, it was found that the desired stability margins are met with $T_i=3.4$ and $K_c=0.7353$ as shown in Figure 6, which were reached by using the approximation of fractional-order controller described by

(14)$G_c\left(s\right)=\frac{{\beta }_1{s}^4+{\beta }_2{s}^3+{\beta }_3{s}^2+{\beta }_{4}s+{\beta }_5}{{\gamma }_1{s}^4+{\gamma }_2{s}^3+{\gamma }_3{s}^2+{\gamma }_{4}s+{\gamma }_5},$

where ${\beta }_1=175.8$, ${\beta }_2=1.555\times {10}^8$, ${\beta }_3=4.309\times {10}^{13}$, ${\beta }_4=3.854\times {10}^{18}$, ${\beta }_5=1.08\times {10}^{23}$ and ${\gamma }_1=5.125$, ${\gamma }_2=8.409\times {10}^6$, ${\gamma }_3=3.288\times {10}^{12}$, ${\gamma }_4=3.86\times {10}^{17}$, ${\gamma }_5=1.08\times {10}^{22}$.

In order to show the effectiveness of the fractional-order approximation, the step response of the closed-loop transfer function is depicted in Figure 7.

Figure 7 shows that it took the output $y\left(t\right)$ an approximate of $t\approx 12$ $\mathsf{\mu }$s to reach the reference, thus, the proposed approximation of fractional-order PID controller would regulate properly the output voltage.

Figure 8 shows the desired output voltage and the inductor current for three different values of reference on Figure 4, i.e., $\left.\mathbf{a}\right)r=30V$, $\left.\mathbf{b}\right)r=65V$, $\left.\mathbf{c}\right)r=95V$ and the corresponding control laws, produced by the fractional-order approximation of PID controller (14). As can be seen, for the three conditions of reference r, it took to the fractional-order PID controller to make the plant to reach the desired value of voltage in a very small period of time. On the other side, one can see that the control signals on Figure 8b converged to their expected value of average Duty cycle $\overline{D}$ for each condition of r, i.e., $\overline{D}=[0.3,0.65,0.95]$, respectively.

Figure 9 shows the output voltage and inductor current of Buck converter from Figure 1 for reference $r=70V$ and different values of the load $R=[0.5,0.8,1.2,0.7,0.3]\mathrm{k}\mathsf{\Omega }$. One can conclude that the fractional-order PID approximation (5) regulates properly with load variations, which implies robustness of the controller. As can be seen, four load changes were introduced during the process and they all were overcome by the fractional-order PID controller with an amplitude of variation not greater than $\pm 0.6V$.

3.3. Comparison with Integer–Order PID Controllers

Looking to determine the advantages of employing the approximation of a fractional-order PID controller, typical PID were synthesized and tuned based on two scenarios: the former, considering frequency domain approach, a PID controller was designed seeking to meet a compromise between stability margins and performance; the latter, ensuring stability by shaping the closed-loop characteristic polynomial as a Hurwitz polynomial [37] is obtained by equating the characteristic polynomial with the desired one given by $(s^2+2\zeta {\omega }_{n}s+w_n^2)(s+a)$, for $\zeta ,{\omega }_n,a>0$.

The PID parameter values are $[K_p,T_i,T_d]=[11.5957,7.7568\times {10}^{-5},4.0679\times {10}^{-7}]$ for the first option and $[K_p,T_i,T_d]=[5.5230,2.0084\times {10}^{-4},1.207\times {10}^{-6}]$ for the second option, where $[{\omega }_n,\zeta ,a]=[500000,0.3,5000]$. Due to the design values of the converter in Table 1, parameters ${\omega }_n,a$ have to be chosen to ensure the system to be stable.

Figure 10 shows the step response of both integer–order PID controllers. Frequency response of the closed-loop system with the PID controller designed in frequency domain is shown in green in Figure 6.

The performance parameters of the output voltage by using the three option of controllers are summarized in Table 2, from which one can characterize the response and regulation speed. Comparing data from Table 2, it is easy to note that the approximation of fractional-order PID controller produces a faster response than the one produced by the typical ones, since rising time $t_r$ and settling time $t_s$ from third column are smaller than the corresponding ones in fourth and fifth column. Time constant $\tau$ and peak time $t_p$ have similar behavior. It is important to highlight from Table 2 that even when the time constant $\tau$ and rising time $t_r$ are slightly different, it took the typical PID controllers three times and twice, respectively, the time of the fractional-order PID approximation to settle the control variable.

On the other hand, the output produced by the fractional-order approximation of PID controller exhibits a steady state error $e_{ss}$ that can be neglected due to its magnitude. The overshoot seems to be the only disadvantage, due to it cannot be reduced beyond $\%M\approx 50\%$ with acceptable values of $T_i$.

The time domain representation of the fractional-order PID controller (14) is given as follows,

(15)$G_c\left(t\right)=A_0+A_1{e}^{-{\gamma }_{1}t}+A_2{e}^{-{\gamma }_{2}t}+A_3{e}^{-{\gamma }_{3}t}+A_4{e}^{-{\gamma }_{4}t},$

where the constant and exponent values are provided in Table 3.

Analyzing (15), one can note that the structure of the fractional-order PID controller will change, since four of its elements will vanish as time passes, remaining $A_0$ only. Thus, for this particular case, the computed fractional-order PID controller approximation has a proportional effect in time domain, which corresponds with the presence of error in steady–state. Additionally, the constant and exponent magnitudes of (15) produce a fast control law, causing the transient of the output to occur in a very short period of time, making the whole system ideal for analog implementation. It is important to mention that, even when the vanishing terms reach zero in a very short period of time, their contribution is fundamental in that interval, since omitting them causes a non desired response.

Lastly, in order to determine the robustness of the closed-loop system for every PID controller, Mu Analysis is performed [38], which computes the structured singular value ${\mu }_{\Delta }$ bounds, where $\Delta$ is the set of possible uncertainties. The analysis provides information about the magnitude of the uncertainty that destabilizes the system and the frequency where this occurs. For this particular case, the uncertainty in the parameters will be considered ±30% their nominal value. Figure 11 depicts the upper (solid lines) and lower (dotted lines) bounds of ${\mu }_{\Delta }$ for every PID controller. The minimum of the stability margin is presented at the peak of ${\mu }_{\Delta }=0.345$, thus, the system can resist up to 89% of increase in the uncertainty and still maintain stability.

4. Proposal for Practical Realization of Fractional-Order PID Controller

A non-integer rational transfer function (RTF) can include fractional integral and derivative terms, which can be positive or negative [39]. Practical implementation of RTF in a physical test–bed requires initially those terms to be approximated as a rational function of two integer–order polynomials within a desired frequency band. The methods developed to perform this approximation can be divided in (a) continue fractional expansion (CFE) and (b) interpolation techniques [40]. For $\left.(a\right)$, one can find the Carlson’s, the Matsuda’s and CRONE methods, among others. For $\left.(b\right)$, one can find the Outsaloup’s, the refined Outsaloup’s, the Chareff’s methods and the technique recently reported in [41]. Once the approximation process has been performed, the synthesis of the RTF can be obtained. This is generally performed by using either: (a) continue fractional expansion (also known as the ladder or paralleled form), (b) partial fractional expansion (also known as the tree fractance or cascaded parallel) or (c) a combination of both. After processing the approximation and synthesis, the electrical circuit can be obtained. To this end, there are two main approaches, analog and digital [40]. The first one uses resistors, capacitors and operational amplifiers (OPAM), and the second employs FPGA boards.

In this paper, an analog realization is illustrated. By substituting $T_i=3.4$, $K_c=0.7353$ and $\alpha =0.494$ in (9) and solving, the fractional-order PID controller one can obtain,

(16)$G_c\left(s\right)=5.00004+\frac{0.7353}{s^{0.494}}+8.5000068s^{0.494}.$

For the approximation stage, the toolbox ninteger was used [42]. The process to obtain the fractional PID approximation is shown in Appendix A. The obtained transfer function after the MATLAB function residue execution [43] is rewritten as follows:

(17)$G_c\left(s\right)=\left(\frac{-12691}{s+8.2292}-\frac{1}{s+0.0149}\right)+1.61121\times {10}^3.$

The process to obtain the fractional-order PID synthesis is described in Appendix B. The analog equivalence of (17) is given on basic OPAM configurations (adder, integral, gain), and it is shown in Figure 12. The section on top corresponds to the first fractional integral equivalent (left to right), the section in the middle corresponds to the second fractional integral equivalent (left to right), the bottom one relies to the gain, and the right section (red) refers to the adding points. Parameters of Figure 12 are given in Table 4.

By looking Table 4, it can be noticed the particular value of the capacitor, which is high compared to the usual values given in mili or micro Farads. Nowadays, due to the development of super–capacitance technology, it is easy to find and available in the market [44].

5. Discussion

This paper addresses the synthesis and tuning of the approximation of a fractional-order PID controller. Fractional-order approach is used due to it has been proven that controllers of non-integer order outperformed integer–order ones. However, the fractional integro–differential operator is described by either the Grünwald–Letnikov, Riemann–Liouville or Caputo definition, combined with different optimization algorithms to approximate the parameters of the controller. This results in an increase of computational and implementation complexity, which are the main drawbacks of that proposal.

The design process of the controller suggested in this paper considers a frequency domain approach. The approximation is achieved through biquadratic modules with flat phase response, which is used to generate the iso–damping characteristic to bear gain variations. The controller design takes into consideration both robustness and desired closed-loop characteristics, keeping the tuning process simple.

The resulting approximation of fractional-order PID controller produces a notable response with very fast speed of regulation. A comparison with integer–order PID controllers, one designed in frequency domain to meet the same gain and phase margins and the other to ensure stability of the closed-loop system, allowed to determine qualitatively the superiority of the suggested approach, since settling time $t_s$ in the closed-loop system with the fractional-order PID controller is a third and the half the time needed to settle the control variable with the typical PID ones.

On the other hand, the robust stability analysis allowed to determine that the three PID controllers have similar robust stability margins around the frequency band of interest center at $\omega =2\times {10}^5$ rad/s. The minimum stability margins were at the peaks ${\mu }_{\Delta 1}=0.345$ for the fractional-order PID controller and the 1st option of typical PID controller, while ${\mu }_{\Delta 2}=0.325$ for the 2nd option of PID controller.

6. Conclusions

In this paper, a non-integer PID controller is suggested to regulate voltage in a DC–DC Buck converter. A method with frequency design approach was used to synthesize the controller. The resulting fractional-order PID controller approximation successfully achieved the control objective. The time domain structure of the non-integer PID controller resembles to a proportional controller. It was quantitatively shown that the fractional-order PID controller approximation produces an acceptable response, i.e., the steady–state error can be neglected due to its magnitude, but the time to reach the reference signal is much smaller than the one produced by typical PID controllers. This is, without hesitation the most remarkable result of this paper.

As future direction of this work, two possibilities are contemplated: the first direction is to consider two nested loops in the design of the controller, i.e., voltage and current, looking to simplify the design. Taking advantage of this approach, instantaneous transient response and DC shift of the output voltage for step changes in the load current, when using fractional-order controllers, can be investigated. Second possible direction is to explore the fast response capability of the system, introduced by the fractional-order controller, in other power converters such as the Boost configuration, whose right half–plane zero results in tighter frequency restrictions.

Author Contributions

Conceptualization, A.G.S.-S.; Formal analysis, A.G.S.-S.; Investigation, A.G.S.-S.; Methodology, A.G.S.-S.; Resources, A.G.S.-S., M.A.R.-L., F.J.P.-P. and J.A.V.-L.; Validation, A.G.S.-S., M.A.R.-L. and F.J.P.-P.; Visualization, A.G.S.-S., M.A.R.-L. and F.J.P.-P.; Writing—original draft, A.G.S.-S.; Writing—review & editing, A.G.S.-S., M.A.R.-L., F.J.P.-P. and J.A.V.-L. All authors have read and agreed to the published version of the manuscript.

Acknowledgments

Authors would like to thank to CONACYT México for cátedra ID 6782 and 4155.

Conflicts of Interest

The authors declare no conflict of interest.

Appendix A

Matlab R2013b and the ninteger toolbox were used to obtain the fraction PID approximation and synthesis. The program is shown as follows:

[Figure omitted. See PDF]

The code describe returns the values on Table A1 to produce the following equivalence,

(A1)

$G_c\left(s\right)=\left(\frac{-12691}{s+8.2292}-\frac{1}{s+0.0149}\right)+1.61121\times {10}^3.$

Table A1

Values obtained with the described MATLAB code.

Parameter	Value 1	Value 2	Factor
r	−1.2691	−0.0001	$\times {10}^7$
p	−8.2292	−0.0149	$\times {10}^3$
k	0.0000	1.6112	$\times {10}^3$

Appendix B

To determine the equivalence (A1) in basic OPAMs configurations (adder, integral, gain), (A1) needs to be rearranged first as follows,

(A2)

$G_c\left(s\right)=(-1542.43)\left(\frac{1}{0.120496s+1}\right)+(-67.1141)\left(\frac{1}{67.1141s+1}\right)+1611.21.$

By inspecting (A2), it can be noticed that the integral terms can be represented by the block diagram shown in Figure A1. Therefore, the corresponding block diagram for (A2) will be given as shown in Figure A2, where $I_1=0.120496$, $I_2=67.11409$, $G_1=-1542.23$, $G_2=-67.1141$ and $G_3=1611.21$.

Figure A1

Block diagram to represent the operation $1/(1+Is)$.

[Figure omitted. See PDF]

By inspecting Figure A2, it can be determined that the equivalent OPAMs circuit will be constructed by three adders, two integrators and three gains as shown in Figure 12.

To find the values for the OPAM circuit, the ones marked with * in Table A2 are proposed and the overall are obtained by applying the transfer function of the adder, integrator, gain and substituting $I_1$, $I_2$, $G_1$, $G_2$ and $G_3$. Please note that the negative values given in the Fractional PID approximation are obtained by using the OPAM inverter configurations.

Figure A2

Block diagram representing the equivalence (A2).

[Figure omitted. See PDF]

Table A2

Parameter values for the electrical circuit with OPAMs of Figure 12.

Parameter	Value	Parameter	Value
$R^{*}$	10 k$\mathsf{\Omega }$	$R_4$	0.67 M$\mathsf{\Omega }$
$R_1$	0.12 $\mathsf{\Omega }$	$R_5$	0.45 M$\mathsf{\Omega }$
$R_2$	67 $\mathsf{\Omega }$	$C_1^{*}$	1 F
$R_3$	15.4 M$\mathsf{\Omega }$	$C_2^{*}$	1 F

Figures and Tables

Figure 1. (a) Electrical representation of the converter. (b) Electrical diagram describing the way a Buck converter is implemented.

Figure 2. Duty cycle for the Buck converter on Figure 1, producing the described operating modes.

Figure 3. Frequency response of the transfer function of Buck converter described by (4) with parameter values of Table 1.

Figure 4. Closed-loop control diagram considered to regulate the voltage of the DC–DC Buck converter of the Figure 1.

Figure 5. Frequency response with flat–phase characteristic centered at ωgc for the approximation (5), where ωgc is the gain crossover frequency of (4).

Figure 6. Frequency response of closed-loop transfer function of a Buck converter when using integer–order PID (green) and fractional-order PID (blue).

Figure 7. Step response of the closed-loop transfer function of a Buck converter by using the approximation of the fractional-order PID controller (14).

Figure 8. (a) Output voltage and inductor current of the Buck converter of Figure 1 controlled through the fractional-order PID (14). (b) Control laws produced by (14) for reference signal r ar=30V, br=65V and cr=95V.

Figure 9. (a) Output voltage subject to load variations. (b) Inductor current subject to load variations.

Figure 10. Step response of the closed-loop transfer function of a Buck converter by using typical PID controllers. (a) PID controller designed in frequency domain. (b) PID controller designed to ensure stability.

Figure 11. Upper (solid lines) and lower (dotted lines) bounds of the structured singular value μΔ to determine robust stability margins of the closed-loop systems.

Figure 12. Electrical circuit with OPAMs for the fractional-order PID controller (17).

Table 1

Component values of Buck converter from Figure 1.

Element	Notation	Value
DC voltage source	$V_g$	100 V
Capacitor	C	1 $\mathsf{\mu }$F
Inductor	L	2.2 mH
Resistance (Load)	R	500 $\mathsf{\Omega }$

Table 2

Performance parameters for the step response of the Buck converter in Figure 1 described by (4).

Parameter	Notation	FO PID	Typical PID 1st Op.	Typical PID 2nd Op.
Steady–state error	$e_{ss}$	0.0001	0	0
Time constant	$\tau$	1.09 $\mathsf{\mu }$s	1.37 $\mathsf{\mu }$s	1.67 $\mathsf{\mu }$s
Rising time	$t_r$	1.39 $\mathsf{\mu }$s	1.5 $\mathsf{\mu }$s	2.05 $\mathsf{\mu }$s
Peak time	$t_p$	2.77 $\mathsf{\mu }$s	3.9 $\mathsf{\mu }$s	5.22 $\mathsf{\mu }$s
Settling time	$t_s$	12 $\mathsf{\mu }$s	35.9 $\mathsf{\mu }$s	26.5 $\mathsf{\mu }$s
Overshoot	%M	53.8%	66.7%	45%

Table 3

Constant and exponent values of the fractional-order PID controller in time domain.

Constant	Exponent
$A_0=34.3012$
$A_1=-7.459\times {10}^5$	${\gamma }_1=1.1307\times {10}^6$
$A_2=3.3127\times {10}^3$	${\gamma }_2=3.3044\times {10}^5$
$A_3=-1.61\times {10}^4$	${\gamma }_3=1.3893\times {10}^5$
$A_4=2.3168\times {10}^3$	${\gamma }_4=4.06\times {10}^4$

Table 4

Parameter values for the electrical circuit with OPAMs of Figure 12.

Parameter	Value	Parameter	Value
R	10 k$\mathsf{\Omega }$	$R_4$	0.67 M$\mathsf{\Omega }$
$R_1$	0.12 $\mathsf{\Omega }$	$R_5$	0.45 M$\mathsf{\Omega }$
$R_2$	67 $\mathsf{\Omega }$	$C_1$	1 F
$R_3$	15.4 M$\mathsf{\Omega }$	$C_2$	1 F