Growth of high-quality epitaxy of GaAs on Si with engineered Ge buffer using MOCVD

Abstract

This article presents novel process methods to grow GaAs on 200 mm Si substrates with low threading dislocation density (TDD) and no anti-phase domains (APDs). The GaAs layers were grown on the engineered Ge buffer with thickness of 0.9 and 1.7 μm with surface roughness as low as 0.58 nm. The growth temperature of GaAs was tailored from low, intermediate, and high temperature (LT, IT, and HT) at 460 °C, 600 °C, and 670 °C, respectively, to impede the defects to propagate to the HT layer. It has been demonstrated that the quality of GaAs layers is sensitive to the surface roughness and layer quality of Ge buffer. Therefore, Ge buffer was grown selectively with lateral overgrowth over the wafer to decrease the defect density to a low level as possible for GaAs growth. For all samples, Chemical mechanical polishing (CMP) was applied for Ge buffer to ensure the surface roughness prior to GaAs growth. This study presents novel methods to optimize/improve GaAs growth on engineered Ge buffer grown on 0° − and 6° − miscut Si substrates. The impact of layer quality, surface roughness, and design of Ge buffer growth (selective or non-selective growth) on GaAs growth has been studied. The outcome of this study provides a monolithic solution for photonics and electronics in large size Si substrates.