Real-Time Fault Detection to Ensure the Safe Operation of the Single-Phase Five-Level VIENNA Rectifier

Abstract

This work aims to explore and evaluate the nonreversible AC/DC five-level structure from the point of view of its operational safety: high electrical security on internal destruction and continuity in operation. It only has low-voltage monotransistor cells (Si and SiC 600 V max) and is intrinsically tolerant to imperfection control and parasites, therefore naturally secure. The design and lab-test of fault monitoring and fault diagnosis with just one voltage sensor of a single-phase five-level VIENNA rectifier were proposed. This real-time diagnostic method allows for a safe stop or corrective control strategy based on the reconfiguration of the modulation. The reconstruction strategy allows for optimization of the current and voltage signals as well as power factor. A continuous post-fault operation can be achieved for critical applications. An experimental prototype 3 kW/230 VAC/800 VDC/32 kHz was created to validate the proposed fault diagnosis method and reconfiguration control method.

1. Introduction

The study of switch failures in a VIENNA structure requires in-depth knowledge of the operating principles of this converter under normal conditions. The principles have been widely researched by numerous international papers [1,2,3,4]. Moreover, the techniques to improve the characteristics [5,6,7,8,9,10] and the understanding of the natural balance of flying voltages [11,12] take an important place in our study. The dynamic model in the form of equations of state can be transcribed by the latter to understand the evolution of the flying voltages of the converter and to find the steady state directly.

On the other hand, the study of the behavior of the VIENNA converter following the failure of a power switch analyzes the constraints generated by the fault to check whether the safety of the converter is ensured and whether the degraded operation is possible. Usually, the fault types of multilevel converters are classified into two: open-circuit fault (OCF) and short-circuit fault (SCF). In general, OCF does not usually stop the system, but adversely affects it. Thus, suitable protections are proposed, and sizing criteria are identified to guarantee the safety of the converter from the design stage and possibly increase the availability of the application. Therefore, several OCF diagnostic methods have been proposed based on the radius and form of the current [13,14,15,16]. Instead of using the current, the OCF can be detected by output voltage for multilevel cascade inverters [17]. Otherwise, the destruction of an MOSFET in SCF mode is always linked to a thermal problem (problem of heat dissipation, thermomechanical problem of the contacts, problem in extreme conditions). Its cause has two origins: an internal semiconductor fault or a control fault [18]. If the SCF is found in the converter system, the added circuit breaker or fuse will disconnect the power source from the converter to avoid damage to the system [19,20].

Various fault diagnosis approaches are developed to confront the switch fault in power converts, some of which are briefly compared in [21]. These methods prevent further damage or provide continuous service by applying an FT strategy based on redundancy or reconfiguration.

When determining the SCF, many studies use the derivative of current for the fault alarm and fault localization [22,23]. The voltage across the stray inductance is sensed and by comparing this voltage to a threshold, the SC fault is detected. This method is fast, but the circuit is complex due to the additional circuit.

The SC fault diagnosis based on gate voltage monitoring is not complex compared to the di/dt method, but it needs additional hardware for fast detection [24].

The other SC diagnosis method is the desaturation method in which the voltage across the collector-emitter terminals is measured. If VCE reaches a specific threshold, the detection is active [25,26].

The method presented in [27] is based on gate voltage comparison. This method is simple, but it needs additional hardware for fast detection.

The voltage observer method [28,29,30] uses the input or output voltage to diagnose SCF. The time of detection of this method is about 10 ms.

Sensing of the DC link current provides another possibility to discriminate SCF. This method is fast and practical, but requires too many variable measurements to discover the location of the fault [31].

The SC diagnosis based on artificial intelligence (AI) algorithms, due to their ability to recognize patterns, is proposed to detect and identify faults in a CM inverter [32,33]. The existing SC fault diagnosis methods with the main characteristics are summarized in Table 1.

Through synthesis, it was found that many diagnostic and fault-tolerant methods for an inverter have been developed during the last decade, but there is little research for the AC/DC converter. The inverter and the rectifier have different current patterns for each other under the same condition of MOSFET’s SCF. Accordingly, it is difficult to apply the same kind of diagnostic methods used for the inverter to the rectifier. Most exiting SC fault diagnoses are based on a hardware structure with a high level of complexity and cost. Therefore, this article will present theoretical and technical analysis of the real-time detection and localization method based on the frequency analysis of input converter voltage and reconfiguration control. This method is very practical, fast, and does not need added hardware.

Furthermore, this method can save the power factor as well as the distortion of the grid current under fault conditions. In this study, the effects of SCFs on the input current, input voltage of converter, flying capacitor voltages, and DC-link capacitor voltages were described: whatever the location and the origin of the switch failure, when the healthy MOSFET of the faulty cell was in low resistance mode, the capacitor belonging to this cell was short-circuited. The released energy generated an important current but was nevertheless limited by MOSFET. The two flying voltages evolved rapidly until equilibrium was reached. This static canceled naturally the short-circuit current which during the faulty time was confined to the defective cell. The redundancy came from the imbricated cells of the five-level VIENNA structure that made it possible on the one hand to confine the short-circuit current within the faulty cell and on the other hand to limit the energy thanks to the flying voltage sources of low capacities. That is why the capability of this particular multilevel converter to combat internal failures and provide a safe stop or a post-fault operation was studied.

The next parts of the paper are arranged as follows: Section 2 describes the behaviors of serial redundancy of the five-level VIENNA rectifier; the control strategy is presented in Section 3; Section 4 proposed real-time fault detection based on harmonic analysis and reconfiguration control; the proposed method diagnosis is validated with simulation in Section 5 and with experiment test in Section 6, and the conclusions of study are presented in Section 7.

2. Serial Redundancy of Five-Level VIENNA Rectifier

The three-level Power Factor Correction (PFC) VIENNA topology was invented by W. Kolar [34]. As shown in Figure 1, the single-phase five-level VIENNA converter works like a three-level BOOST on each half of the cycle: if the input current is positive, the cells {T₁, D₁}, {T₂, D₅} form a three-level BOOST with the flying capacitor C_f1 and the midpoint return diode D₄; if the current is negative, the cells {T₂, D₂}, {T₁, D₆} form a three-level BOOST with the flying capacitor C_f2 and the midpoint return diode D₃ [35]. It allows the input inductance to be divided by 4 and, above all, it allows us to take advantage of serial redundancy, i.e., fault tolerance.

The operation of topology and their corresponding input voltage are shown in Table 2 and Table 3. The diodes {D_p, D₁, D₄, D₅} work on the positive half cycle, the others {D_n, D₂, D₃, D₆} work on the negative half cycle, the operation is identical to that of the three-level BOOST, however, two MOSFETs operate in full cycle.

The voltage V_cf1 oscillates on the positive half cycle and the voltage V_cf2 oscillates on the negative half cycle, the flying voltage is connected to the output bus by clamped diodes, the ripple takes place according to the state of charge of the flying capacitors. On the positive half cycle V_cf1 (symmetrical operation of V_cf2): if V_cf1 + V_cf2 > V_dc/2, then the clamped diode D₅ is conducting and capacitor C_f1 is discharged; if V_cf1 + V_cf2 < V_dc/2, then the clamped diode D₅ is blocked, and capacitor C_f1 is charged.

Considering T_sw is the switching period of the active switch, F_sw is the switching frequency of the active switch, and α₁ and α₂ are the duty cycle, which are the ratios of the conduction time of the active switches (T₁, T₂). Table 2 and Table 3 present the different states of switches, the voltage of diodes, V_input, and the current through the main semiconductor devices.

The equation which shows the operation principle of current and voltage of active devices T₁ and T₂ can be written in a matrix form of state space averaged equations as x ˙ = Ax + Bu, where x ˙ is the state vector; A and B, respectively, are the matrices of the averaged state space model in small signal with their values given by:

For I_La > 0

(1)$\left[\begin{array}{c}{\dot{I}}_{La}\\ {\dot{V}}_{dc1}\end{array}\right]=\left[\begin{array}{cc}0& -\frac{1}{L_a}\\ \frac{1}{C_{dc1}}& -\frac{2}{R{C}_{dc1}}\end{array}\right]\left[\begin{array}{c}{I}_{La}\\ V_{dc1}\end{array}\right]+\left[\begin{array}{cc}0& \frac{1}{L_a}\\ -\frac{1}{C_{dc1}}& 0\end{array}\right]\left[\begin{array}{c}{I}_{La}\\ V_{dc1}\end{array}\right]u1+\left[\begin{array}{c}\frac{E_a}{L_a}\\ 0\end{array}\right]$

For I_La < 0

(2)$\left[\begin{array}{c}{\dot{I}}_{La}\\ {\dot{V}}_{dc2}\end{array}\right]=\left[\begin{array}{cc}0& -\frac{1}{L_a}\\ \frac{1}{C_{dc2}}& -\frac{2}{R{C}_{dc2}}\end{array}\right]\left[\begin{array}{c}{I}_{La}\\ V_{dc2}\end{array}\right]+\left[\begin{array}{cc}0& \frac{1}{L_a}\\ -\frac{1}{C_{dc2}}& 0\end{array}\right]\left[\begin{array}{c}{I}_{La}\\ V_{dc2}\end{array}\right]u2+\left[\begin{array}{c}\frac{E_a}{L_a}\\ 0\end{array}\right]$

With:

(3)$L_a=\frac{V_{dc}/2}{4.∆I.F_{sw}}$

(4)$C_{dc1\left(2\right)}=\frac{8.E_{amax}.I_{Lamax}}{3\pi .V_{dc}.∆V_{dc}.\omega }$

ω: angular velocity of AC source.

To have reliability compatible with the operating life of the required equipment (can reach a few tens of years), various possibilities are based on safety margins, reliable products, and protection systems. These mainly relate to the semiconductor device which is the central element of the converter. Failure means an entity is no longer able to perform a required function, and faults occurring in a converter lead in most cases are the failure of a single switch. Since a power switch can only take two states, its failure can be split into two groups: a short-circuit fault (the switch is still conducting) or an opening fault (the switch is open or nonconducting). Capacitor faults and operating drifts are not taken into account.

If T₁ is failed at low impedance, the associated diode with it in the same switching cell D₁ remains blocked as long as the voltage across capacitor C_f1 is positive. This cell does not switch any more, and the current in the condenser C_f1 thus presents a negative continuous component causing its discharge (return of energy towards the source), otherwise, the capacitor C_f2 is charged (Figure 2a). At the time of complete discharge, the converter goes from five to three levels. The faulty transistor is in series with T₂ and sees the same current and continues to dissipate losses, except for a slight transient due to the presence of rapid “parasitic” storage cycles—low energy destocking of C_f1. The discharge of C_f1 and charge of C_f2 obviously induce a doubling of voltage which is accepted here because of the rated voltage of 600 V for a voltage V_dc/2 of 400 V. This is a very attractive additional point of this structure.

In case of a physical failure of the transistor (Figure 2), the defective transistor receives the conduction current and the decoupled current of the adjacent transistor which is in series, filtered through the snubber effect by C_fx; x ϵ (1;2). This paper specifically focuses on the SCF of two MOSFET as a case study. After a fault, the continuity operation requires a stability short-circuit mode of the components, which on the one hand is ensured by the low voltage rating and on the other hand by the low stored energy in the flying capacitors. When the second fault appears, a fuse installed in the middle point allows switching to secure rectifier mode thanks to the high frequency diodes.

3. Control Strategy for the Five-Level VIENNA Rectifier

3.1. Fundamental Principle Control Strategy Phase Opposite Disposition (POD)

The modulation of the five-level VIENNA structure is performed by the first modulation called a phase shift [36]. It is used phase-shifted and imbricates four carriers. The phase shift control performs pulse width modulation (PWM), with two imbricated carriers per transistor which themselves are 180° out of phase concerning the other two carriers. It allows to carry out a sequential modulation. The control of the two transistors is independent as shown in Figure 3. The perfectly distribution voltage across the terminals of the other blocked components in series (for example, T₁ passing implies D₁ supports V_dc/4 in reverse and VD_p supports at most V_dc/4).

3.2. Fundamental Principle Control Strategy Phase Disposition (PD)

The state machine control strategy is used by the principle of a truth table which defines all the control possibilities of the transistors.

There are two state machines, one for positive current and upper machine, and another for negative current and lower machine. The operation is symmetrical.

Let us take a look at a positive current case (Figure 4).

The complete operation of this converter in five levels requires some precautions. The voltage at the terminals of the flying capacitors V_cf1 and V_cf2 must be close to V_dc/4 in order to have a balanced distribution of the voltages at the terminals of the components. By comparing the modulation (m = 1 − α) with two imbricated carriers, the position is defined as follows:

• If m < carrier 1, then wave function = 0

• If m > carrier 1 and m < carrier 2, then wave function = 1

• If m > carrier 2, then wave function = 2

The wave function is the image of the converter voltage. The states S₄ and S₃ correspond to the ON and OFF states of the T₁ and T₂. On the other hand, the intermediate states S₁ and S₂ can be obtained in two ways depending on the desire to charge or discharge the concerned flying capacitor (Table 4). Therefore, the generation of the control signal and balance of flying voltages are realized at the same time.

In programming, it is necessary to set up a bandwidth to control the minimum and maximum values of the voltage V_cf. The principle of generating control signals from state machines is presented in Figure 5.

The FFT study and the THD voltage calculation showed that the PD method was better than the POD method (Figure 6). However, the proposed harmonic detection method using input voltage was not directly effective because the cells and carriers were not directly in correspondence. Thence, in the next section, the modified carriers will be introduced.

4. Modified Carrier, Real-Time Detection, and Localization of SCF

4.1. Modified Carriers

The reconfiguration of the control of a single-phase VIENNA converter can only be carried out if it can detect the fault and locate the faulty cell. These operations can be realized with a single sensor by analyzing the signature of the input voltage. Moreover, the previously used PD-PWM method with the two-state machines was not directly compatible with the harmonic monitoring method. In fact, this close control separates on one side the generation of the reference PWM wave and on the other, the control sequencer. This process does not make it possible to make a direct link between the apparent carriers of the modulator and the control of the cells in an unambiguous manner. Thus, the modified carriers were proposed to replace the two 3L-PD modulators with state machines by two new 3 L modulators named “Modified Phase-Shift”, allowing to generate the same global and optimal waveform in 5 L without a state machine. Thus, each cell associated a carrier with a determined phase at the switching frequency, as shown in Figure 7 and Figure 8.

4.2. Diagnostic Method

When an SCF occurs, the apparent frequency of the converter’s input voltage naturally goes from 2 × F_sw to F_sw. This modification has several consequences for the behavior of the converter, and the input current ripple is quadrupled (passage from five to three levels and from 2 × F_sw to F_sw), new harmonics at frequencies multiple of the switching frequency appear. Based on harmonic analysis, only one voltage sensor was sufficient.

However, the measured signal does not directly give the state of the converter’s health. A detector was designed to extract useful information from the input voltage signal in order to identify the fault when it occurs. To realize the detector calculations, the basic functions were performed. In addition, an in-depth simulated study of disturbances was carried out during design to obtain a very robust and very reliable detector. The detector was designed to operate on a five-level VIENNA converter. Its operation under real operating conditions required significant practical work. In addition, this prototype uses logic functions that are sensitive to EMI. However, the identification and location of an SCF were validated in the laboratory as described in Figure 9.

The input voltage was filtered by a band pass filter to keep only the fundamental at the switching frequency. As this signal includes only one harmonic, Shannon’s theorem tells us that three points were enough to define it without losing information on its module and its phase. These points were taken at particular times to obtain, after a change of reference, the image of the vector of the input voltage (at the fundamental) in a direct orthonormal plane (X and Y). The square of the module was obtained by a conventional calculation (X₂ + Y₂). This result was compared at all times to a detection radius of variable amplitude and less than the square of the appearing module during an SCF.

The fundamental of the input voltage is non-zero when a fault occurs, and its envelope is sinusoidal:

(5)$v_s\left(t\right)=V_S\cos ({\omega }_{sw}t-\frac{\pi }{4})$

By memorizing the spaced fundamental point at interval time equal to Tsw, a base of expressing phase shift dimension was defined between the two quantities. To determine the theoretical phases appearing after a fault, the first point A1 was taken at the rising edge of the T2’s carriers while the point A2 was taken at the rising edges of the T1’s carriers.

The fundamental phase of the input voltage made it possible to locate the faulty cell as soon as the fault appears. To locate the faulty cell, it sufficed to determine the positions of the X and Y coordinates of the vector of the input voltage at the fundamental and to check in which sector they were located, as shown in Figure 10. This very fast operation was carried out by some calculations presented on Equations (6) and (7).

For ON-fault appearing on T₁:

(6)$V_{detec}\left(t\right)=\frac{-\sqrt{2}.V_s.Vdc}{8\pi }.\sin \left(\alpha \pi \right)$

For ON-fault appearing on T₂:

(7)$V_{detec}\left(t\right)=\frac{\sqrt{2}.V_s.Vdc}{8\pi }.\sin \left(\alpha \pi \right)$

According to the representation (Figure 10) of the order 1 harmonic of the input voltage in the vector plane for the case of a fault on cell 1 or 2, and the calculating results of Equations (6) and (7), it can be seen that the delivered information by this signal was sufficiently rich to be able to easily detect and locate the SCF. The detection of the appearance of the fault was given by the fundamental modules. Whatever the faulty cell, the amplitude of this harmonic theoretically made it possible to detect the fault. The location of the faulty cell was given by the phase of the voltage fundamental for the modulation. These results show that it was possible to use the V_detect’s sign and the modulation’s sign to locate the position of the fault cell (Figure 11).

To balance the flying capacitors, a simple method with the passive filter can be used that will filter the ripple at F_sw. However, to take advantage of the failure redundancy of the five-level VIENNA scheme, in the post-fault operation, the problem occured with the filter. Therefore, the active balance by the modulation method was proposed.

4.3. Post-Fault Operation

An essential rule in an embedded system shows that a simple failure is not critical. For the converter, this rule means that an internal failure on a component or a local malfunction does not cause the shutdown of the global functionality. This constraint is taken into account today by a system approach: the supply, conversion, and actuation architectures are multiplied, distributed, segregated, technologically differentiated, and therefore highly redundant with an additional cost in terms of mass and management/switching and maintenance. It is an objective of absolute security. In this work, an alternative path consists of providing each elementary converter with its safety and structural fault tolerant properties in avoiding systematic redundancy that is referred to overall mass reduction.

The study was based on a dysfunctional analysis. The most fragile components with regard to the most severe/critical constraints were T₁, T₂ or D₁, D₂. When a SCF occurred, at the time of complete discharge and charge V_cf1, V_cf2 (depending on the case), the converter went from five to three levels overall. At this point, the flying capacitor voltages were no longer balanced, so the active flying capacitor control part was removed, and the reconfiguration of control after fault is shown in Figure 9.

5. Simulation Results

To validate the principle of detection, localization of SCF, the entire detector was simulated in PSIM software with principal parameters as shown in Table 5. This allowed to validate its operating principle. In addition, having voluntarily simulated all the functions from available component models in the library, all the electronic diagrams were validated before their realization.

To allow degraded operation of the converter following an SCF, it sufficed to reconfigure the control of the faulty switch. The previous results could be verified from a PSIM simulation presented in Figure 12 and Figure 13. The converter generated only harmonics of multiple rows at two times the switching frequency when its flying voltage reached its equilibrium point (V_dc/4).

After the SCF of T₁ or T₂ occurred in the five-level VIENNA rectifier, the input current was distorted while flying capacitor voltages were unbalanced, as shown on the right of Figure 12 and Figure 13. In addition, the DC-link voltage included the ripple of the grid frequency (50 Hz) by the distorted phase input currents. If the proposed fault-tolerant control method was applied after the SCF diagnosis, the ripple of the DC-link voltage was stabilized, and the voltage difference between the upper and lower DC-link capacitors could be decreased. These results show that the distorted reference voltage by the fault was compensated by the proposed fault-tolerant method, and removed re-commutation of control.

FFT analysis for input current is shown in Figure 14 while the compared theoretical results of the three cases: normal operation, SCF on T2, and abnormal operation with diagnosis and the tolerant method are depicted in Figure 15. The current magnitude did not change much in the three cases. However, the current THD varied markedly from 4.59% in the case of normal operation to 42.9% in the case of SCF operation without a fault diagnosis (Figure 14). Because any SCF on a MOSFET leads to an absence of switching of the cell in which it is involved and therefore an apparent duty cycle goes from a value α to a value of 1. This makes a variation of the average value of the input voltage, taken over a switching period, and is established at V_dc/2 × (1 − α) when the flying voltage has reached its steady state. This voltage transient was applied to the terminals of the input inductance which reacts by a strong transient current regime which was clearly visible in the simulations. Finally, when a fault was detected, the reconfiguration was applied: the operation took place at the switching frequency in order to reduce switching losses and allow secure continuity, the THD current was dropped by about 21.9%. The voltage fluctuations (6.3%) and power factor (0.97) were also better when the fault diagnosis and the tolerant control method were applied compared to those in the non-applied case (8.1% and 0.85, respectively).

6. Experimental Results

The experimental tests with parameters as shown in Table 6 were carried out in a single phase on a 3 kW rectifier comprising four cells and five voltage levels (Figure 16). The main characteristic of this converter comes from the dimensioning of the power structure and the close controls which have been adapted and produced to allow operation without damage when an SCF appeared. The modules used a SiC MOSFET CMF20120D and a SiC IDT16S60C 600 V/16 A diode, the control board based on DSP (TMS320C6711) and FPGA ACEX 1K100 allowed operation at 800 V-32 A-32 kHz in AC/DC mode.

To ensure the safety of all switches after an SCF, a converter-dimensioning procedure was established. It consisted of determining a couple of flying capacitors—power switches, to dissipate the energy released during the SC without damage in an imbricated cell.

Furthermore, voltage protections were also defined. Therefore, the given clipping voltage protected the switches without putting the active clipper in permanent degraded operation.

The load used in practice was similar to the load used in the simulation. On the other hand, the tests were carried out under reduced voltage (100 VAC) to ensure the safety of the converter.

Under normal conditions, as shown in Figure 17, the output voltage was stable around 400 VDC, and the input current was well-balanced with the sine waveform. After an SC occurred on T₁ of the five-level VIENNA rectifier diagram, the current was no longer sinusoidal and distorted (Figure 18), similarly to the T₂ failure case. Notably, the positive current was greatly distorted because the current flowed through the abnormal state of the flying capacitor, then, level 1 no longer existed. Furthermore, the dc-link voltage contained oscillations at the grid frequency (50 Hz) due to the distortion of the input current. In order to improve the reliability of the system and eliminate subsequent problems, the fault-tolerant control method was required for the five-level VIENNA active rectifier. After the diagnosis and tolerant control were applied, the input voltage had only three levels, and the input current was near sinusoidal, as shown in Figure 19.

The simulation and experimental results are perfectly consistent (Figure 19). The envelope of the demodulated signal conformed to theory, namely a maximum value in the vicinity of a control duty cycle equal to 1/2 and a dip when the duty cycle moves away from this value. It is noted that a fast transient state was in the form of a “spike” during the active sequence of demodulation. This transient was due to the change of modulation band and therefore to the “jump” of phase, so it became the harmonic at the switching period.

Following the detection of the SCF, Figure 19b reports the real-time reconfiguration strategy after a delay time of the diagnosis between three and five switching periods (Figure 20 and Figure 21), the detector transmitted the detection signal to the modulator to reconfigure the control. This operation took a short time; the flying voltage of the nonfaulty cell quickly equilibrated to reach V_dc/2 in the steady state. The input voltage at the terminals of open switches was then perfectly distributed, and their overvoltage was maintained at 50% compared to that of the faultless operation. Under these conditions, the safety of all components was ensured. The converter could then continue to operate on two cells until a new fault appeared. However, a second failure would lead to the destruction of the converter. Therefore, the first fault was repaired before the second fault occurred.

Among the many advantages of this detector, we can mention that fault detection was very fast. On the other hand, the identification of the failure was carried out over a few switching periods.

Additionally, the robustness of the detector was excellent at rapid variations in input voltage and duty cycle. It could also operate when the switching frequency was variable. Finally, it was insensitive to measurement noise, since the signal was filtered.

The operation of the detector allowed us to reconfigure the control following an SCF with a detection time of about 0.15 ms. In addition, we were able to verify that the degraded step with reconfiguration can ensure the continuity of operation of the converter without any danger. The operational reliability of the VIENNA rectifier was thus proven.

7. Conclusions

The five-level VIENNA structure is attractive due to its minimum number of transistors and also its high efficiency and good redundancy during failure. The simulations showed the interest of this structure in normal and degraded operation. In this paper, the real-time fault detection algorithm based on frequency analysis, location of fault, and reconfiguration control method for the SCF were presented. The proposed fault diagnosis method markedly improved the THD input current, power factor, and voltage ripple. The experiment results with the 3 kW single-phase five-level VIENNA rectifier were used to verify the performance of the proposed diagnosis.

Author Contributions

Conceptualization, P.T.T.L.; methodology, P.T.T.L.; software, P.T.T.L.; data curation, N.N.B.; writing—original draft preparation, P.T.T.L., N.N.B. and V.M.P.; writing—review and editing, P.T.T.L., N.N.B. and V.M.P.; supervision, D.V.B.; project administration, N.N.B.; funding acquisition, N.N.B. All authors have read and agreed to the published version of the manuscript.

Funding

This article was funded by the study project “Study and design of diagnosis and reconfiguration system for multilevel rectifier in the wind turbine system”, code: VAST07.05/19-20, 2019–2020.

Institutional Review Board Statement

Not applicable.

Informed Consent Statement

Not applicable.

Data Availability Statement

Not applicable.

Acknowledgments

The authors specially thank the Vietnam Academy of Science and Technology, Institute of Energy Science for creating favors in stakeholder communication, information collection, and funding provision during the implementation of the study.

Conflicts of Interest

The authors declare no conflict of interest.

Publisher’s Note: MDPI stays neutral with regard to jurisdictional claims in published maps and institutional affiliations.

Figures and Tables

Figure 1. Single-phase five-level VIENNA converter with only two MOSFET.

Figure 2. Current flow paths under SCF. (a) T1 is short-circuited, (b) T2 is short-circuited, (c) local behavior following an SCF (x corresponds to a faulty cell, y corresponds to a nonfaulty cell; x, y ϵ (1; 2)).

Figure 3. Fundamental control strategy POD for a five−level VIENNA converter.

Figure 4. Fundamental control strategy PD for a five−level VIENNA converter.

Figure 5. Principle of generating control signals from the state machine for a five-level VIENNA rectifier.

Figure 6. FFT analysis of the input voltage in the case of applied POD and PD method.

Figure 7. Modified phase shift carriers for three-level voltage corresponding to 0 < m < 1/2 and acquisitions at each switching period of the two defining fundamental points.

Figure 8. Modified phase shift carriers for three-level voltage corresponding to 1/2 < m < 1 and acquisitions at each switching period of the two defining fundamental points.

Figure 9. Representation of the functions of the fault detector for a five-level VIENNA Converter.

Figure 10. Location of the faulty cell by analyzing the fundamental phase of the input voltage.

Figure 11. (a) Flowchart of fault detection process. (b) Logic circuit for diagnosis of switch fault.

Figure 12. Diagnostic simulation results with a short-circuit on T1.

Figure 13. Diagnostic simulation results with a short-circuit on T2.

Figure 14. FFT analysis for input current ILa: (a) healthy condition, (b) ON-fault T2, (c) diagnosis + tolerant method.

Figure 15. Theoretical results for three cases.

Figure 16. Experiment system of the five-level VIENNA active rectifier.

Figure 17. Steady state waveforms at 3 kW.

Figure 18. Experiment results for short-circuit fault condition on T1 without reconfiguration.

Figure 19. Short-circuit fault condition on T2 with reconfiguration. (a) Simulation result; (b) experiment result.

Figure 20. Experiment result for short-circuit fault condition on T1 with the detection signal.

Figure 21. Experiment result for short-circuit fault condition on T2 with the detection signal.

Table 1

Overview of the fault diagnosis methods for SCF.

SC Diagnosis Method	Diagnostic Time	Computational Cost	Complexity
di/dt control [22,23]	Fast	High	High
Gate voltage monitoring [24]	Fast	Low	High
VCE monitoring [25,26]	Slow	Low	Low
Gate voltage comparison [27]	Normal	Low	High
Input and output voltage observer [28,29,30]	10 ms	Medium	Medium
DC link current [31]	Fast	Normal	High
AI algorithm [32,33]	Slow	High	Normal

Table 2

The switches’ states and the average values of the current and voltage for I_La > 0.

Current Sign	T 1	T2	IDp	IDn	ID1	IT1	Vinput	Level X	VD 3	VD 5	VD 6
ILa > 0	0	0	ILa	0	ILa	0	Vdc/2	2	Vdc/2	0	Vdc/2
	0	α2	ILa	0	ILa	0	Vdc/4	1	Vdc/4	Vdc/4	Vdc/4
	α1	0	ILa	0	0	ILa	Vdc/4	1	Vdc/4	0	Vdc/2
	α1	α2	ILa	0	0	ILa	0	0	0	Vdc/4	Vdc/4

Table 3

The switches’ states and the average values of the current and voltage for I_La < 0.

Current Sign	T 1	T 2	IDp	IDn	ID 2	IT 2	Vinput	Level X	VD 4	VD 5	VD 6
ILa < 0	0	0	0	ILa	ILa	0	−Vdc/2	−2	Vdc/2	Vdc/2	0
	0	α2	0	ILa	ILa	0	−Vdc/4	−1	Vdc/4	Vdc/4	Vdc/4
	α1	0	0	ILa	0	ILa	−Vdc/4	−1	Vdc/4	Vdc/2	0
	α1	α2	0	ILa	0	ILa	0	0	0	Vdc/4	Vdc/4

Table 4

Description of the state machine operation for the healthy operation of a five-level VIENNA rectifier for the positive current case.

Control Signal
T 1	T 2	Output Voltage	dVcf/dt	State Machine
0	0	Vdc/2	0	S 3
0	1	Vdc/4	>0	S 1
1	0	Vdc/4	<0	S 2
1	1	0	0	S 4

Table 5

Specifications and conditions of the simulation.

Input grid voltage	220 V	Output DC link voltage	800 V
Grid frequency	50 Hz	Output power	3 kW
Flying capacitance	33.5 µF	PWM method	PD-modified PWM
Top/bottom capacitor	2.5 mF	Inductor	0.185 mH
Switching frequency	32 kHz	Sampling time	62.5 ns

Table 6

Specifications and conditions of the experiment.

Grid frequency	50 Hz	Switching frequency	32 kHz
Flying capacitance	40 µF	DC-link capacitance	2.4 mF
Output power	3 kW	PWM method	PD-modified PWM

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