Intrinsic polarization coupling in 2D α‐In2Se3 toward artificial synapse with multimode operations

Abstract

Emulation of advanced synaptic functions of the human brain with electronic devices contributes an important step toward constructing high‐efficiency neuromorphic systems. Ferroelectric materials are promising candidates as synaptic weight elements in neural network hardware due to their controllable polarization states. However, the increased depolarization field at the nanoscale and the complex fabrication process of the traditional ferroelectric materials hamper the development of high‐density, low‐power, and highly sensitive synaptic devices. Here, we report the implementation of two‐dimensional (2D) ferroelectric α‐In₂Se₃ as an active channel material to emulate typical synaptic functions. The α‐In₂Se₃‐based synaptic device features multimode operations, enabled by the coupled ferroelectric polarization under various voltage pulses applied at both drain and gate terminals. Moreover, the energy consumption can be reduced to ~ 1 pJ by using high‐κ dielectric (Al₂O₃). The successful control of ferroelectric polarizations in α‐In₂Se₃ and its application in artificial synapses are expected to inspire the implementation of 2D ferroelectric materials for future neuromorphic systems.

INTRODUCTION

Over the past few decades, computers based on the conventional von Neumann architecture have achieved great success in performing arithmetic operations, leading to the revolution of information technology.¹ However, the physically separated logic and memory blocks, known as von Neumann bottleneck, inevitably limit the computational efficiency and speed as well as the scalability of the architecture.^2,3 Inspired by human brain, neuromorphic computing architecture featuring analog capability and parallel connection stands out as a promising alternative for data-centered computing in the era of the great information explosion.^4–6 The high efficiency of the human brain stems from the basic element, i.e. synapses, which can process and store information simultaneously.^7,8 To effectively mimic the human brain's massive parallelism and robust features in hardware, it is crucial to develop electronics that can highly emulate the biological functions of synapses.

To date, memristive devices based on a wide range of materials have been investigated for artificial synapses.^9–12 Whereas traditional silicon synapses require complex circuits, transition metal oxide (TMO)-based memristive devices suffer from disadvantages of high power consumption and poor device reliability.^13–15 In addition, the traditional TMO-based devices usually lack diverse electrical characteristics, leading to the limitation in mimicking bio-synaptic functions.¹⁶ In contrast, ferroelectric materials are becoming promising candidates as synaptic weight elements in neural network hardware through polarization control.¹⁷ However, it is difficult for the traditional ferroelectric materials to meet the scaling trends requirement due to the increased depolarization field at the nanoscale.^18–20 Besides, growing high-quality ferroelectric thin films usually need careful selection of growth substrates as well as complex fabrication processes.^21–23 Against this backdrop, two-dimensional (2D) ferroelectric materials have emerged as attractive candidates for memristor devices^24–27 due to the stability of their ferroelectricity when devices are scaled down and the fact that they can be used directly as a semiconductor channel without the need for integrating ferroelectric dielectric with other semiconductors.²⁸ Also, 2D indium selenide (α-In₂Se₃) has been demonstrated recently to possess coupled in-plane (IP) and out-of-plane (OOP) ferroelectric polarizations simultaneously.^24,29,30 Through manipulating the ferroelectric polarization directly in the semiconducting channel, 2D α-In₂Se₃-based electronic devices hold potential for artificial synapses with simple structure but rich functions.

Here, we demonstrate a 2D α-In₂Se₃-based artificial synapse whose properties can be easily modulated by applying various stimuli at both drain and gate terminals, featuring multimode operations. Typical synaptic behaviors of short-term plasticity (STP), including inhibitory/excitatory postsynaptic current (IPSC/EPSC), paired-pulse facilitation (PPF), as well as long-term plasticity (LTP), such as spike-time-dependent-plasticity (STDP) and spike-rate-dependent-plasticity (SRDP), have been emulated in this α-In₂Se₃ device based on the ferroelectric polarization-switching dynamics. Specifically, electrical pulses applied at either drain terminal or gate terminal can act as presynaptic spikes to modulate the conductance of the channel, featuring multimode operations in the device. In addition, the flexible tunability of STP–LTP transition has been exhibited, emulating the memory consolidation process in the mammal brain. By virtue of a high-κ dielectric insulator (Al₂O₃), the power consumption of the device under V_g stimulus can be further reduced to ~1 pJ. With these characteristics, our α-In₂Se₃ field effect transistor (FET)-based artificial synapse demonstrates the enormous prospects for direct implementation and integration in hardware and high-density chips with low power consumption.

EXPERIMENTAL SECTION Device fabrication

The few-layer α-In₂Se₃ flakes were mechanically exfoliated from the bulk α-In₂Se₃ crystals (HQ Graphene) using a scotch tape and transferred to a degenerately p-type doped silicon substrate with 285 nm SiO₂. Standard electron beam lithography was employed to define the conducting channel, and the Ti/Au source and drain electrodes (5 nm/75 nm) were deposited by thermal evaporation. Also, 20-nm Al₂O₃ was grown by atomic layer deposition (ALD) with trimethyl alumium and H₂O as precursors at 120°C. After Al₂O₃ deposition, top-gated Ti/Au electrode (5 nm/75 nm) was completed by the second lithographic patterning and metallization process.

Piezoresponse force microscopy (PFM) characterization

PFM tests were performed on flakes exfoliated on an Au film on the Si substrate. OOP and IP PFM signals were simultaneously recorded by a Bruker Icon system under a drive frequency of 280 kHz and amplitude of 3000 mV.

Device characterization

The as-fabricated device were wire-bonded to a leaded chip carrier and loaded in the custom-designed high-vacuum system (base pressure ~ 10⁻⁷ mbar) for electrical characterizations. The related electrical measurements were performed by an Agilent 2912A source measure unit.

RESULTS AND DISCUSSION

Figure 1A shows the side view of the 2H phase α-In₂Se₃ at the atomic scale. Due to the noncentrosymmetry characteristics of the hexagonal stacking, α-In₂Se₃ exhibits the coexistence of IP and OOP ferroelectricity, whose polarizations are intrinsically coupled with each other.³¹ The hexagonal structure of the crystal was verified by both Raman and X-ray diffraction (XRD) characterizations. As shown in Figure 1B, five feature peaks are observed in the Raman spectrum, which are consistent with previous reports.^32,33 The peaks at 89 and 156 cm⁻¹ are assigned to E² and E³ mode, respectively, whereas the one at 104 cm⁻¹ corresponds to A(LO + TO) mode and the peaks at 181 and 196 cm⁻¹ are related to A(LO) mode.^34,35 The fingerprint E² mode at 89 cm⁻¹ reveals that the α-In₂Se₃ crystal belongs to the 2H phase,³³ which is further verified by the single c-plane peak and its interplanar spacing in the XRD spectrum (Figure S1A).^33,35

Figure 1. (A) The crystal structure of the 2D ferroelectric semiconductor α-In2Se3, showing intrinsic coupled IP and OOP switching (redball: Seatom; blueball: Inatom). (B) The Raman spectrum of the α-In2Se3. The Raman peak located at ~89 cm−1 verifies the hexagonal crystal structure of the used α-In2Se3. (C) Local ferroelectric switching loops on the Au substrate, showing clear ferroelectric polarization switching under an external electric field. (D) The topography figure of the α-In2Se3. The (E) IP and (F) OOP PFM phase images of the α-In2Se3. IP, in-plane; OOP, out-of-plane; PFM, piezoresponse force microscopy

The ferroelectric properties of α-In₂Se₃ nanoflakes were characterized by the PFM measurement. Figure 1C demonstrates the local ferroelectric polarization switching of α-In₂Se₃ in the OOP direction by using the metal–semiconductor–metal structure. The prominent PFM phase (black dots) and amplitude (red dots) hysteresis loop and the 180° phase-contrast greatly confirmed that the ferroelectric polarization of the α-In₂Se₃ can be switched under an external electric field. Figure 1D displays the topography figure of the sample used for PFM characterization. The corresponding IP and OOP PFM phase images are exhibited in Figure 1E,F, respectively. A strong and correlated piezoelectric response with a phase-contrast of 180° can be observed. The OOP PFM phase image before and after a direct current (DC) written bias within the rectangle pattern was further characterized, as displayed in Figure S2. It is obvious that the FPM image shows the phase reversal after a + 8 V tip bias, further verifying the switchable ferroelectric polarization in α-In₂Se₃.

Taking advantage of the switchable and intercoupled polarizations in IP and OOP directions of α-In₂Se₃, an artificial synapse with multimode operations can be realized. In the biological neural systems, when a biological spike reaches the axon terminal of the presynaptic neuron and triggers the presynaptic neuron to release neurotransmitters (e.g., Ca²⁺ and Cl⁻), these neurotransmitters will bind to the receptors on the postsynaptic neuron and cause a transient postsynaptic membrane depolarization. This results in the inhibitory/excitatory postsynaptic potential or current (IPSP/EPSP or IPSC/EPSC) depending on the transmitting efficacy of the synapse, called synaptic weight.³⁶ For the most common synapses in the human brain, the synaptic efficacy is not fixed but can be modulated according to the activities of the pre- and postsynaptic neurons, which is defined as synaptic plasticity.³⁷ Figure 2A shows the schematic of an α-In₂Se₃ FET-based artificial synaptic device and the corresponding biological synaptic diagram. The electrical spike applied at the drain or gate terminal serves as the artificial presynaptic input spike, whereas the triggered source–drain current in the channel acts as the stimulated postsynaptic current. The tunable weight in biological synapses can be conveniently imitated by the conductance change in the electronic device. The atomic force microscopy image of one representative device is demonstrated in Figure 2B, from which the thickness of the device is determined to be about 32 nm. The corresponding microscopy image of this device is shown in Figure S1B.³⁸

Figure 2. (A) A schematic of the α-In2Se3 FET-based artificial synapse and the corresponding biological synaptic diagram. The electrical spike at the drain or gate terminal serves as a presynaptic input spike, whereas the source–drain channel current acts as stimulated postsynaptic current. The channel conductance changes analogous to the weight plasticity. (B) The AFM image of the device. Scale bar = 2 μm. (C) Isd–Vsd of the device with the maximum Vsd sweeping range increased from 2.0 to 6.0 V. The sweeping directions are indicated by the arrow. Isd–Vbg of a representative device under different (D) Vsd values and (E) sweeping range. Arrows indicate the sweeping direction. AFM, atomic force microscopy; PSC, postsynaptic current 

Standard DC measurements were carried out first to characterize the basic electronic characteristics of the α-In₂Se₃ device. Figure 2C shows the output curve (I_sd–V_sd) of the device with the maximum source–drain voltage (V_sd) sweeping range increasing from 2.0 to 6.0 V under V_g = 0 V. The sweeping sequence and directions are indicated by the arrows. With increasing the maximum V_sd value, the obvious resistive switching behavior can be consistently observed in all I_sd–V_sd curves. Besides, the hysteresis behaviors become more obvious under a larger V_sd sweeping range.

To gain insight into carrier transport across the contact region, the measured output curve was analyzed (Figure S3). It is found that the measured I_sd–V_sd data can be explained by a more realistic model, a series resistance connecting two back-to-back Schottky junctions, instead of one simple Schottky junction. More detailed discussions are presented in the Supporting Information Material. As shown in Figure S4, the qualitative energy band diagram based on two back-to-back Schottky barriers is proposed. First, the larger current under the large negative source–drain bias (Figure S4A) is attributed to the image force barrier lowering effect at the drain electrode (or the forced junction), whereas the lower current under the positive source–drain bias (Figure S4B) is limited by the low electric field at the source electrode (or the grounded junction).³⁹ This kind of image force barrier lowering effect mainly affects the force junction when it is reversely biased, and the effect is weaker on the reversely biased ground junction.³⁹ Therefore, the current is higher at negative V_sd. When the magnitude of the applied bias is large enough to flip the ferroelectric polarization, the polarization will point sequentially toward the source electrode,^33,40 as shown in Figure S4C, resulting in band lowering and thus increased current.

The dual-sweep transfer characteristics (I_sd–V_bg) measured under different V_sd values show the obvious clockwise hysteresis loop, as displayed in Figure 2D. It is worth noting that the I_sd–V_bg curves under multiple sweeps at fixed V_sd = 0.2 V exhibit a reversible and repeatable clockwise loop with a negligible change after 30 sweeping cycles, illustrating the moderate stability of the fabricated device (Figure S5A). More important, hysteresis does not exhibit obvious variation under different gate sweeping rates (Figure S5B), which excludes the origin of the hysteresis behavior from the intrinsic or interface trap states-induced charge trapping and de-trapping. This indicates that the reason is mainly due to the ferroelectric switching in the α-In₂Se₃ channel.^41,42 Figure S6A shows the resistive switching performance of the device. The device can be set to a low-resistance state (LRS, after forward sweeping of V_bg from −50 to 0 V) or a high-resistance state (HRS, after backward sweeping of V_bg from 50 to 0 V), depending on the different V_bg scan direction. It is worth noting that 100 reversible HRS–LRS switching cycles under the pulse voltage mode can be realized, as shown in Figure S6B, implying good endurance of the device. Figure 2E displays the variations of the clockwise hysteresis window of transfer curves according to the different V_bg sweeping range at fixed V_sd = 0.2 V. It can be observed that the hysteresis window increases as the maximum V_bg increases from 5 to 50 V due to the enhanced IP dipole alignment under large V_bg values.^30,43–45

The hysteresis behaviors under both V_sd and V_bg scans, as discussed above, can provide the potential for this α-In₂Se₃ device to emulate the synaptic plasticity. To evaluate the essential synaptic behaviors, the device was first measured under V_sd pulse (at V_g = 0 V), as displayed in Figure 3. It should be noted that a small V_sd value does not affect the status of the ferroelectric polarization in the α-In₂Se₃ channel, as indicated by the output curve in Figure S7, and therefore the V_sd reading value can be chosen within the range of ±0.5 V. As shown in Figure 3A, when a negative V_sd stimulus (e.g., −4 V, 0.04 s) was applied to the drain terminal of the synaptic device, the abrupt drop of current as a function of time can be observed, accompanied with the rapid decay process after the peak value. This behavior emulates the process of an inhibitory spike on the presynaptic membrane that induces a decrease in the postsynaptic current level, that is, IPSC in biological synapses. In addition, a presynaptic pulse with a larger width (Figure 3A) or amplitude (Figure 3B) can induce a more significant change in the postsynaptic current due to the enhanced polarization under longer or larger electric force.

Figure 3. Biological functionality characterizations of the artificial synapse by applying pulses at the drain terminal. The source–drain current of the α-In2Se3-based synaptic transistor as a function of time. The synaptic weight changes with different Vsd pulse (A) duration and (B) amplitude. (C) The PPF index (A2/A1) as a function of pulse interval (∆t) between two successive presynaptic pulses. Inset: The triggered IPSC versus time under a pair of presynaptic spikes. A1 and A2 represent the amplitudes of the first and the second IPSCs, respectively. (D) STP-to-LTP transition by increasing the pulse train number. Inset: the extracted weight changes as a function of pulse train number under −3 and −5 V stimulations (width: 20 ms). (E) The analog weight update of α-In2Se3 transistor-based depressive synapse under different pulse amplitude (Vsd = −1 V/−2 V/−3 V/−4 V). The pulse width ∆t=0.1s, and the conductance is read at Vsd = 0.2 V. (F) The continuous decrease of channel conductance G caused by a series of Vsd voltage pulses with different frequencies. IPSC, inhibitory postsynaptic current; LTP, long-term plasticity; PPF, paired-pulse facilitation; STP, short-term plasticity

Among numerous functions performed by the synapses, some critical functions like fast response and information filtering are usually achieved by the STP, which rapidly fades away after several minutes or much shorter time.^15,46 PPF is one of the most important learning rules in STP, which is significant for transmitting information contained in the temporal pattern of a spike train.^47,48 In PPF, the synaptic current triggered by the second spike is higher than that evoked by the first one when the second spike follows the previous one subsequently. Besides, the magnitude of the enhancement is determined by the time interval ($∆t$) between two spikes, where a larger $∆t$ will lead to a smaller amplitude enhancement. This behavior is believed to be related to the Ca²⁺ concentration in the presynaptic neuron.⁴⁹ The first spike will enhance the overall Ca²⁺ level, and thus increase the resulting synaptic current stimulated by the second spike. Due to the exponential decay of the residual Ca²⁺, the PPF effect becomes weaker when the time interval increases. The inset in Figure 3C displays the triggered IPSC versus time by a pair of presynaptic spikes. The PPF index, defined as the ratio of two peak values $A_2/A_1$, is plotted as a function of pulse interval to evaluate the magnitude of the PPF enhancement, as exhibited in the main part of Figure 3C. The data points are further well fitted by a double exponential function $A_2/A_1=C_1\times \text{exp}\left(-\frac{∆t}{t_1}\right)+C_2\times \text{exp}\left(-\frac{∆t}{t_2}\right)+C_0$, with the two characteristic time constants $t_1~4.3\text{ms}$ and $t_2~99\text{ms}$, which are commensurate in scale with those in a biological synapse (range of millisecond–second).^50–52

Compared with the fast synaptic response decay in STP, the synaptic efficiency in LTP can last longer than STP from hours to days, which is greatly complementary to STP in biological synaptic systems.^46,48,51 The LTP can be usually realized by increasing the duration and intensity of the stimulus to reach the threshold value or applying a strong train of stimuli.⁴⁸ The human memory is believed to be modulated by the dynamic changes in the strength of the synaptic connections, which is related to the high-order synaptic activities like metaplasticity and learning experience-dependent plasticity.^48,53,54 Thus, the emulation of STP–LTP transition in artificial synaptic devices is essential for the realization of memorizing and forgetting functionalities for the future artificial intelligence systems. Our artificial synaptic device can exhibit two types of conductance states: one undergoes rapid decay after weak signal inputs, analogous to STP, and another one features a long-lived stable state, conceptually analogous to LTP. As discussed above, when applying the V_sd pulses with longer duration (Figure 3A) or higher intensity (Figure 3B), the device exhibits the synaptic response transition from STP to LTP. More important, the STP–LTP transition can also be realized under a train of repeated stimuli. As shown in Figure 3D, when applying a weak pulse (black line), for example (−3 V, 20 ms), the device exhibits an STP behavior consistent with what has been discussed before. Intriguingly, when a train of 10 pulses was applied, not only the IPSC peak increases but also the retention time becomes longer, corresponding to LTP behavior in biological counterpart (red line). Similar to that in the biological system, the LTP also performs different time courses of decay, depending on the stimulus conditions. The synaptic weight change can be defined as $\mathrm{\Delta }\mathrm{W}=\mathrm{\Delta }\text{PSC}/\text{PSC}$. The inset of Figure 3D displays the extracted weight changes of the synaptic device as a function of the applied pulse train number (#) (pulse amplitude: V_sd = −3 or −5 V, pulse width: 20 ms), in which pulse trains with higher amplitude and more repetition pulse numbers will lead to a larger weight change. Furthermore, the longer pulse width (~10 s) at V_sd = 5 V can induce the switching between two resistance states, as shown in Figure S8, illustrating the highly tunable synaptic performance of this device. In conclusion, the weight plasticity in this artificial synaptic device can be modulated by pulse amplitude, pulse duration, pulse train number, or their synergistic effect.

Emulation of the adaptive learning ability in the human brain requires continuous adjustability of the conductance in the device.^17,55 The gradual decrease of the synaptic weight, known as depression, can be mimicked via the conductance decrease in the analog-type artificial devices. As shown in Figure S9A, identical voltage pulses train with a fixed pulse interval of 0.1 s and a fixed pulse width of 0.1 s are introduced to the drain terminal as the presynaptic input. Figure 3E reveals the evolution of the channel conductance (measured at V_sd = 0.2 V) as a function of pulses number with different amplitudes (V_sd = −1, −2, −3, −4 V), where the larger pulse amplitude can lead to a steep change of conductance. Apart from the pulse amplitude, the response of the device conductance to multiple voltage pulses can also be modified by the firing frequency of presynaptic spikes, mimicking another basic learning principle termed as SRDP in neuron systems.^51,56 As exhibited in Figure 3F, pulse trains with higher frequency result in a faster depression process. The schematic diagram of the applied pulses can be found in Figure S9B. It is worth mentioning that the pulse train schemes like identical pulses or pulses with incremental width and voltage can be further investigated to optimize the LTP linearity, which is significant to design artificial neural networks.

More than the V_sd pulse stimulation, due to the intrinsic IP and OOP dipole coupling in the α-In₂Se₃ channel, this artificial synaptic device can also be modulated by the V_g pulse, displaying multimode operations and tunability. The emulation of the biological functionalities under V_g pulse has been investigated and shown in Figure 4. When a positive input pulse is applied at the back-gate terminal of the device (Figure 4A,B), the device shows an inhibitory postsynaptic response, which is consistent with the transfer curve in Figure 2D. Moreover, the change of the IPSC also increases with an increase in the pulse duration and pulse amplitude. Similarly, the device shows EPSC behavior under a negative V_bg stimulation with the weight change modulated by the pulse duration and amplitude as well (Figure 4E,F). By modulating the pulse status, STP-to-LTP transition can also be realized under different V_bg pulses. For example, as displayed in Figure 4C and G, PSC decays very fast under a weak pulse (V_bg = ± 4 V, 20 ms), whereas PSC can be retained within the measured time scale after 10 consecutive pulses (Figure 4D and H). Furthermore, the recorded positive and negative weight changes as a function of the applied pulse train number are summarized in Figure 5A, where the larger weight variation can be observed under higher pulse amplitude in both IPSC and EPSC.

Figure 4. Biological functionality characterizations of the artificial synapse by applying pulses at the gate terminal. The synaptic weight changes with different positive Vbg pulse (A) duration and (B) amplitude. (C) Isd response when a (4 V, 20 ms) Vbg pulse is applied, indicating STP characteristics. (D) Isd response under a train of Vbg pulses (10 pulses) is applied, indicating a transition from STP to LTP. The corresponding synaptic weight changes with different negative Vbg pulse (E) duration and (F) amplitude. (G) Isd response when a (−4 V, 20 ms) Vbg pulse is applied. (H) Isd response under a train of Vbg pulses (10 pulses) is applied, indicating a transition from STP to LTP. EPSC, excitatory postsynaptic current; IPSC, inhibitory postsynaptic current; LTP, long-term plasticity; STP, short-term plasticity

Figure 5. (A) The recorded positive and negative weight changes of the artificial synapse as a function of pulse train number under Vbg = −4, −6, −8 V (Excitatory) and Vbg = 4, 6, 8 V (Inhibitory). (B) The synaptic weight change of the device with variation of Δt=tpost−tpre to emulate the STDP behavior. STDP, spike-time-dependent-plasticity

The STDP learning rule is a typical kind of LTP in biological neural systems, which plays an important role in the information processing or brain network function.^56–58 In STDP, the relative time $(\mathrm{\Delta }t=t_{\mathrm{post}}-t_{\mathrm{pre}})$ between the spikes on pre- and postsynaptic neurons has a different impact on the extent and the direction of synaptic modification. The synaptic weight increases (long-term potentiation) when the presynaptic spikes precede the postsynaptic spikes ($\Delta t>0$), whereas synaptic weight decreases (long-term depression) when the temporal order is reversed ($\Delta t<0$), corresponding to the Hebbian learning rule. On the contrary, the anti-Hebbian learning rule presents depression for $\Delta t>0$ and potentiation for $\Delta t<0$, respectively.^46,54,58 Through designing a specific pulse scheme (Figure S9C), Figure 5B presents a negative synaptic weight change for $\Delta t>0$ and vice versa, obeying the asymmetric anti-Hebbian learning rule. The STDP behavior can be quantified by plotting the synaptic weight variation ($\Delta W$) as a function of $\Delta t$, and it can be well fitted by the following equations: [Image Omitted. See PDF]where the fitting constants $A_{\pm }=-25.1/44.6$ and ${\tau }_{\pm }=250.41/-177.88\text{ms}$ control the learning rate and timing sensitivity, respectively. The fitting results are indicated by solid lines in Figure 5B.

Finally, a 20-nm-thick aluminum oxide (Al₂O₃) layer was further deposited on α-In₂Se₃ via ALD, which not only acts as a high-κ gate dielectric but also the passivation layer to protect the underlying α-In₂Se₃ channel.^32,59 Figure S10 shows the transfer characteristics (I_sd–V_tg) of the device in the top-gate configuration under different sweeping conditions. A similar hysteresis behavior can be observed but with a much lower applied voltage value than that in the back-gate configuration, as a lower electric field is needed for high-κ Al₂O₃ gate insulator to tune the status of the ferroelectric polarization in α-In₂Se₃. Figure S11A,B displays the I_sd–V_sd after V_tg spikes, where the I_sd gradually increases (decreases) after applying negative (positive) V_tg spikes. Examplary IPSC behaviors under V_tg stimulation are shown in Figure S11C,D. The voltage amplitude in such top-gate configuration decreases about 10 times as compared with that under V_bg stimulation, which produces a reduced power consumption of ~ 1 pJ (Figure S12).

CONCLUSION

In summary, 2D semiconductor α-In₂Se₃ with intrinsically coupled IP and OOP ferroelectric polarization has enabled the realization of an artificial synapse with multimode operations. Through modulating ferroelectricity polarization in the α-In₂Se₃ channel, the artificial synapse exhibits neuromorphic characteristics of STP including IPSC, EPSC, and PPF, as well as LTP like LTD and STDP. By tuning spike parameters such as pulse amplitude/duration or pulse train number, the STP–LTP transition has also been realized. The power consumption can be further reduced by 10 times to ~ 1 pJ through introducing a high-κ dielectric insulator (Al₂O₃ as an example). These characteristics make 2D ferroelectric materials highly promising as electronic components for future neuromorphic computing.

ACKNOWLEDGMENTS

The authors acknowledge the financial support from Natural Science Foundation of China (U2032147, 21872100), Singapore MOE Grants MOE-2019-T2-1-002, Singapore AME-IRG grant “Scalable Growth of Ultrathin Ferroelectric Materials for Memory Technologies” (Grant No: A1938c0035) by the Agency for Science, Technology and Research, Singapore, and the Science and Engineering Research Council of A*STAR (Agency for Science, Technology and Research) Singapore, under Grant No. A20G9b0135.

CONFLICT OF INTEREST

The authors declare no conflict of interest.