A New Approximate 4-2 Compressor using Merged Sum and Carry

Abstract

Multiplication is the fundamental process in many image processing systems that undertake more computational assets. As many DSP and image applications are tolerable to inaccurate results, approximate multiplication is preferred for energy efficiency. Here in this paper, two types of approximate compressors are proposed by exploring the relationship between the sum and carry from the truth table to utilize them to design energy-saving multipliers. The proposed compressor circuits are synthesized using a 45nm library. The proposed circuits produce better Energy and Energy Delay Product (EDP) percentages when compared with the previously presented approximate compressors. Using the proposed approximate multiplier designs, the application to image processing is also presented in this paper. Image quality parameters like error rate, Normalized Relative Error Distance (NRED), and Average Relative Error Distance (ARED) are evaluated. New parameter Power and Exactness Product (PEP) is introduced, and it explicitly shows that the proposed designs are 35$\%$ and 47$\%$ efficient in terms of structural and quality aspects.