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Abstract

In this paper, an improved harmonic rejecting N-path filter with a circuit-level structure is proposed. A different set of mixing functions is introduced to conventional N-path filters. Systematic analysis shows that the mixing functions have the benefits of harmonic rejection at the radio frequency node. An 8-path circuit-level structure is proposed, and a harmonic gain calibration technique is introduced to calibrate the errors due to the process variation and mismatch. The proposed 8-path filter is designed and simulated under the 65-nm CMOS technology and achieves 17–29dB gain with a 2nd harmonic rejection ratio of 24–31dB, 3rd6th harmonic rejection ratio of 35–60dB, a frequency range of 0.1–1GHz, and a noise figure of 3.8–4.9dB.

Details

Title
A Harmonic Rejecting N-Path Filter with Harmonic Gain Calibration Technique
Author
Bu, Ran 1 ; Jin, Jing 1   VIAFID ORCID Logo  ; Yang, Zhaolin 1 ; Guo, Yuekang 1 ; Zhou, Jianjun 1 

 Shanghai Jiao Tong University, Center for Analog/RF Integrated Circuits (CARFIC), Department of Micro/Nano Electronics, Shanghai, China (GRID:grid.16821.3c) (ISNI:0000 0004 0368 8293) 
Pages
6672-6693
Publication year
2022
Publication date
Dec 2022
Publisher
Springer Nature B.V.
ISSN
0278081X
e-ISSN
15315878
Source type
Scholarly Journal
Language of publication
English
ProQuest document ID
2726605360
Copyright
© The Author(s), under exclusive licence to Springer Science+Business Media, LLC, part of Springer Nature 2022.