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Recent advances in integrated circuit technology will revolutionize future digital system architecture, structures, and digital system design methodologies. The digital design process has to serve as a link between system specifications and the VLSI layout considerations. It is in this context that microprogramming offers the desired design technique. Despite microprogramming being proposed as early as 1951, its effective exploitation had to wait the advent of high speed memory technology.
There were early efforts in microprogram optimization in various forms such as state, heuristic, word and bit reductions. But in view of the fact that most of the microprogram based systems were along vertical or diagonal implementations, the scope of optimization was restrictive.
The contention of this thesis is that with the advent of high density VLSI technology, microprogramming should and must necessarily play an increasingly significant role in the digital design process. To this end, this thesis offers microprogram optimization techniques and interface reduction techniques towards controlled optimization to arrive at good engineering solutions. In this case, a good engineering solution takes into account the desirable features and constraints of VLSI realizations. In particular, microprogramming itself, being memory based, offers structured and well formed layout realizations.
Based on the utilization profile of micro-operations, bit minimization techniques have been proposed utilizing the concept of identity merging and identity distribution. The further possibility of reducing the width of microinstruction through the technique of bit steering may be examined by the 'bit steering' algorithm proposed. Design optimization, specially for VLSI realizations, can be enhanced through the technique proposed for reduction of module interconnections.
The heart of the digital system design process lies in the effective matching of the system requirements (behavioural specifications) and the final VLSI implementations (structural aspects). It is in this context that the proposed algorithms in this thesis will play a significant role. It may further be noted that with increasing chip densities and stringent timing requirements, it will be necessary to utilize parallelism - and hence horizontal microprogramming. All possible optimizing techniques in this effort would greatly improve the integrated design process.