Atomically Thin Amorphous Indium–Oxide Semiconductor Film Developed Using a Solution Process for High-Performance Oxide Transistors

Abstract

High-performance oxide transistors have recently attracted significant attention for use in various electronic applications, such as displays, sensors, and back-end-of-line transistors. In this study, we demonstrate atomically thin indium–oxide (InO_x) semiconductors using a solution process for high-performance thin-film transistors (TFTs). To achieve superior field-effect mobility and switching characteristics in TFTs, the bandgap and thickness of the InO_x were tuned by controlling the InO_x solution molarity. As a result, a high field-effect mobility and on/off-current ratio of 13.95 cm² V⁻¹ s⁻¹ and 1.42 × 10¹⁰, respectively, were achieved using 3.12-nanometer-thick InO_x. Our results showed that the charge transport of optimized InO_x with a thickness of 3.12 nm is dominated by percolation conduction due to its low surface roughness and appropriate carrier concentration. Furthermore, the atomically thin InO_x TFTs showed superior positive and negative gate bias stress stabilities, which are important in electronic applications. The proposed oxide TFTs could provide an effective means of the fabrication of scalable, high-throughput, and high-performance transistors for next-generation electronic applications.

1. Introduction

Metal–oxide thin-film transistors (TFTs) were introduced for use in displays, sensors, and back-end-of-line (BEOL) transistors due to their various advantages, such as low processing temperature, high mobility, low subthreshold swing (SS), optical transparency, and high mechanical flexibility [1,2,3]. Oxide semiconductors in the solution process have attracted a lot of attention because they enable low-cost and high-throughput manufacturing, although sputtered amorphous indium–gallium–zinc–oxide semiconductors are more widely used in industry due to their high uniformity, good electrical performance, and bias stability [4,5,6]. Unfortunately, it is difficult to fabricate high-performance amorphous oxide TFTs using the solution process. Although multicomponent metal oxides are usable to form the amorphous phase, which leads to high uniformity and yield in mass production, a high annealing temperature of over 300 °C is generally required to promote metal–oxygen–metal condensation and densification in solution-processed multicomponent oxide TFTs [7,8]. In addition, semiconductors with relatively low electron mobility are produced via this process due to the poor quality of the solution-processed films compared to vacuum-processed films.

To overcome these issues, various attractive methods have been proposed in terms of the fabrication process, synthesis, and device configuration. For example, combustion synthesis and photochemical activation were introduced for low-temperature fabrications [5,9,10]. Heterostructure semiconductors and various metal doping strategies were proposed to create high-performance transistors [11,12]. With similar goals in mind, various oxide materials have been suggested. Indium oxide (InO_x) is one of the most desirable semiconducting materials due to its high intrinsic electron mobility and relatively low activation temperature (200–300 °C) [13,14]. Despite these advantages, its poor switching characteristics with high off-current and the polycrystalline structure are critical obstacles to the practical use of InO_x TFTs. Controlling the semiconductor thickness at the atomic scale allows the effective tuning of the bandgap and carrier concentration of the semiconductor, thereby enabling the achievements in terms of reasonable switching characteristics, mobility, and bias stability in transistors [15]. Atomic-layer-deposited high-quality InO_x of several nanometers in thickness have been reported for BEOL-compatible transistors [3,16]. However, the formation of atomically thin amorphous InO_x semiconductors through a low-temperature solution process and the high-performance amorphous oxide transistor based on it have not yet been thoroughly studied.

In this study, we address these challenges by developing a solution-deposited ultrathin amorphous InO_x semiconductor. By controlling the molarity of the solution, InO_x semiconductors were deposited at various thicknesses in the range 1.95–5.51 nm. Their crystallinities, bandgaps, atomic bonding states, and electrical characteristics are also presented. Despite being fabricated in a solution processed at a low temperature of 300 °C, InO_x TFTs with optimal thicknesses of about 3 nm exhibited high field-effect mobility (μ_FE) and an on/off-current ratio (I_on/off) of 13.95 cm² V⁻¹ s⁻¹ and 1.42 × 10¹⁰, respectively. We show that the charge transport of the roughly 3-nanometer-thick low-dimensional InO_x is dominated by percolation conduction due to low surface roughness and appropriate carrier concentration. The bias stability values of atomically thin InO_x-based TFTs are also investigated. This achievement shows the possibility of overcoming the limitations of high-mobility semiconductor materials and solution processes.

2. Materials and Methods

2.1. Preparation of Oxide Precursor Solutions

InO_x precursor solutions were prepared for the fabrication of oxide semiconductors. InO_x solutions were prepared by dissolving In(NO₃)₃·xH₂O (Sigma-Aldrich, St. Louis, MO, USA) 2-methoxyethanol at various molarities of 0.05, 0.07, 0.09, and 0.11. All solutions were stirred at a room temperature of 25 °C for 30 min to obtain clear and homogeneous solutions.

2.2. Fabrication of TFTs

Si/SiO₂ wafers were cleaned using sonication for 10 min each in acetone, isopropyl alcohol, and deionized (DI) water. The residual moisture on the cleaned substrates was removed via drying with N₂ and annealing at 300 °C for 30 min. We previously reported the use of a water etchant-based photopatterning method to deposit the patterned low-defect oxide thin films, which is compatible with the solution process [17]. In this study, water etchant-based photopatterning was used to deposit the high-quality InO_x semiconductors. Figure 1 displays a schematic of the process of the fabrication of oxide TFTs. InO_x solution was spin coated at 3000 rpm for 20 s on a cleaned wafer (Step 1). The InO_x-deposited wafer was then soft baked at 100 °C for 30 s (Step 2). Afterward, a fine metal mask was covered for selective exposure to ultraviolet (UV) light for 60–120 s in an N₂ environment (Step 3). UV irradiation (25 mW cm⁻²) was conducted via a low-pressure mercury lamp with two main wavelengths, namely 253.7 (90%) and 184.9 nm (10%). Consecutively, the wafer was developed in a DI water etchant for 1 min (Step 4). Finally, clearly patterned InO_x was subsequentially annealed at 100 °C for 10 min and 300 °C for 2 h on a hot plate in air (Step 5). In this series of processes, UV photons induced the photochemical cleavage of alkoxy groups and decomposition nitrate ligands; therefore, the UV-irradiated parts remained in the etching process. Also, water molecules were sufficiently supplied to the InO_x semiconductor during the etching process, thereby enabling effective hydrolysis and condensation reactions at the annealing stage, as shown in Figure S1. As a result, the reactions promote the densification and defect reduction in InO_x, which are advantageous for high-performance oxide transistors [17]. The final InO_x thicknesses obtained were in the range 1.95–5.51 nm depending on the solution molarity. The 50-nanometer-thick Al was deposited using thermal evaporation for source and drain electrodes. The channel length (L) and width (W) were 100 and 1000 μm, respectively. Here, the molarities of InO_x were 0.05, 0.07, 0.09, and 0.11, and the corresponding InO_x thin films and TFTs were named InO_x-5, InO_x-7, InO_x-9, and InO_x-11, respectively.

2.3. Analysis of Thin Films and Devices

Transmission electron microscopy (TEM; FEI Company, Hillsboro, OR, USA, Titan G2 ChemiSTEM Cs Probe) was used to observe the film’s thickness, crystallinity, and elemental mapping. The surface morphologies of the atomically thin InO_x were observed using non-contact-mode atomic force microscopy (AFM; Park Systems, NX20, Suwon, Republic of Korea). The chemical compositions of the InO_x were analyzed using X-ray photoelectron spectroscopy (XPS; ThermoFisher Scientific, NEXSA, Waltham, MA, USA) with an Al Kα (1486.6 eV) X-ray source. UV–Visible (UV–Vis) spectrophotometry (Perkin Elmer, LAMBDA 265, Waltham, MA, USA) was measured to understand the effects of thickness at the atomic scale on the optical bandgap of InO_x. Grazing incidence X-ray diffraction (GIXRD) (Bruker, D8 Discover, Billerica, MA, USA) tests were carried out using Cu Kα radiation and a small incident angle of 0.5° to investigate the crystalline phase characteristics of InO_x. The electrical characteristics and bias stabilities of the InO_x TFTs were measured using a probe station (MS Tech, model 4000, Seoul, Republic of Korea) with a precision LCR meter (Agilent E4980A, Santa Clara, CA, USA) and a semiconductor parameter analyzer (Keithley 2636B, Cleveland, OH, USA). All devices were measured at room temperature in a dark environment.

3. Results and Discussion

The physical characteristics of atomically thin InO_x semiconductors were investigated. The InO_x semiconductors were deposited using solutions with low molarities, namely 0.05, 0.07, 0.09, and 0.11 M, to obtain films with sub-10-nanometer thicknesses, as depicted in Figure 1. All InO_x thin films were deposited on Si/SiO₂ wafers to enable physical analysis, and film thickness was controlled by fine-tuning the solution molarity, as shown in Figure 2a. As shown in the TEM images of InO_x-5, InO_x-7, InO_x-9, and InO_x-11 in Figure 2b, the InO_x thickness gradually decreases as the molarity decreases. Interestingly, while binary oxides usually have a polycrystalline or nanocrystalline phase, all InO_x films in this study exhibit an amorphous phase, as confirmed in selected area electron diffraction (SAED) patterns, which is favored by industry because it enables the realization of large-area displays and high uniformity and yield (inset of Figure 2b) [18]. In particular, InO_x typically crystallizes in a cubic structure even at low annealing temperatures [19]. This unique result is attributed to the supply of water molecules to InO_x at the initial stage of film formation during the etching step (Figure S1) [17,20]. The amorphous phase is also confirmed via GIXRD patterns, which agree with the SAED patterns (Figure S2). Element mapping was carried out for O, In, and Si. Element mapping showed that the InO_x thickness gradually decreased as molarity increased (Figure S3). AFM images (Figure 2c, top) and the corresponding height profiles (Figure 2c, bottom) of InO_x-5, InO_x-7, InO_x-9, and InO_x-11 are shown in Figure 2c to confirm the surface morphology of ultrathin InO_x at various solution molarities. The yellow dashed line in the AFM images indicates where the height profiles were measured. All samples show smooth surfaces because the films were deposited via spin coating, which is a desirable method used to form thin and uniform films. The correlations between molarity, thickness, and roughness were demonstrated. Figure 2d,e presents the correlations between molarity and thickness and thickness and roughness, respectively. The average thicknesses of InO_x-5, InO_x-7, InO_x-9, and InO_x-11 were 1.95, 3.12, 4.40, and 5.51 nm, respectively. As expected, the thickness linearly increased with the increase in the molarity because molarity indicated the concentration of indium in the solution (Figure 2d). Although the spin coating speed was also one of the methods used to control semiconductor thickness, the controllability of the thickness via this method was poor because the coating speed and thickness did not have linearity. Therefore, the molarity was controlled in this study because it has linearity with thickness. We noted that due to the low viscosity of solution and high spin speed, there was a negligible difference in the thickness of the center and edge regions within the substrate, showing high thickness uniformity. The R-squared (R²) was extracted to examine how well an estimated linear model fit a given dataset. An R² of 1.00 was obtained for the molarity–thickness plots, implying a very high correlation. The average root-mean-square (RMS) surface roughnesses of InO_x-5, InO_x-7, InO_x-9, and InO_x-11 were 0.122, 0.123, 0.125, and 0.132 nm, respectively. The RMS roughness was linearly increased by increasing the semiconductor thickness at the atomic scale and showing a high R² of 0.98 in the roughness–thickness plot (Figure 2e).

Optical bandgaps (E_g) of InO_x with various thicknesses were investigated using a UV–Vis spectrophotometer. The E_g was extracted via the extrapolated linear fit of (αhν)² versus the photon energy, as shown in Figure 3a. The extracted E_g of InO_x-5, InO_x-7, InO_x-9, and InO_x-11 were 3.92, 3.92, 3.90, and 3.88 eV, respectively. The E_g of InO_x tended to increase as the thickness became thinner, which was mainly explained by the quantum confinement effect (Figure 3b) [21,22]. Changes in the chemical bonding states of InO_x with various solution molarities were also investigated using XPS analysis. Figure 3c shows the O1s spectra of InO_x-5, InO_x-7, InO_x-9, and InO_x-11. The oxygen bonding states were analyzed via deconvolution into three Gaussian peaks corresponding to the oxygen species of the metal–oxide (M–O), oxygen vacancy (V_o), and metal–hydroxide (M–OH). The three main Gaussian curves of M–O, V_o, and M–OH were centered at approximately 530.3 ± 0.2, 531.5 ± 0.2, and 532.5 ± 0.2 eV, respectively [23,24,25,26]. We noted that the curve at about 532.5 eV could be interpreted as Si–O [27,28]. Si atoms of SiO₂ usually diffused into the oxide semiconductor during the annealing process in metal–oxide TFT fabrications, meaning that Si–O bonding might exist at the interface between the SiO₂ dielectric and InO_x semiconductor [28]. Here, the ratio of Si–O at the InO_x surface gradually increases as the thickness of InO_x decreases because InO_x thin films are atomically thin with a sub-5-nanometer thickness. In addition, since all processes, except for solution molarity, were identically performed and simultaneously fabricated in the same environment, it is reasonable to interpret the peak at 523.5 eV as Si–O rather than M–OH.

Atomically thin amorphous InO_x TFTs with various solution molarities were fabricated to demonstrate their electrical characteristics. Figure 4a shows the transfer characteristics of InO_x-5, InO_x-7, InO_x-9, and InO_x-11. To investigate the transfer characteristics, the gate voltage (V_G) was varied from −20 to 30 V, while the drain voltage (V_D) was fixed at 30 V. The solid and dotted lines in Figure 4a show the drain (I_D) and gate currents (I_G), respectively. The threshold voltage (V_T) was calculated by fitting a straight line to the plot of the square root of I_D versus V_G in the saturation region (Figure S4). As the thickness of InO_x increased, the V_T negatively shifted and μ_FE increased. The large negative shift of V_T with increasing molarity originated from an increase in the total number of carriers in the semiconductor. Although the electron concentration was the same, the total number of electrons increased as the semiconductor thickness increased, and channels were formed relatively easily as V_G increased. Although InO_x-5 had a low off-current level of 10⁻¹² A and a positive V_T, which is desirable in circuit design, a very low μ_FE of InO_x-5 might be insufficient to operate the electronic devices [29,30]. On the other hand, InO_x-9 and InO_x-11 had high on-currents, but their inferior switching characteristics were not suitable for switching transistors in applications such as displays. On the other hand, InO_x-7 had a high μ_FE and I_on/off of 13.95 cm² V⁻¹ s⁻¹ and 1.42 × 10¹⁰, respectively, meaning that it was considered to be an optimized device with a high electrical performance. The slight difference in I_G for each device might have originated from the subtle differences in the thermally grown SiO₂ film quality rather than the InO_x layer characteristics or fabrication process.

To deduce the charge transport mechanism in the atomically thin InO_x TFTs, μ_FE in relation to V_G is shown in Figure 4b. The gradual decrease in μ_FE with increasing V_G in InO_x-5 suggested that surface roughness scattering dominated in ultrathin semiconductor-based TFTs [21]. Thus, the fluctuation in potential energy due to surface roughness has a high effect on long-range electron transport. In InO_x-7, μ_FE gradually increased as V_G increased, especially showing a power law behavior [17,31,32]. At high V_G, the exponent γ extracted through power law fitting was 0.34, indicating that electron transport was based on percolation conduction. An increase in V_G led to an increase in electron concentration in the channel, which meant that the Fermi level was closer to the conduction band. As the Fermi level increased, the interference of electronic conduction of the potential barrier became insignificant. As the thickness increased, the bandgap became narrower, and the number of carriers in the semiconductor increased. Therefore, when the same V_G was applied, the electron concentration of the channel was relatively high in oxide TFTs, having a thick semiconductor film compared to that of the oxide TFTs with thin semiconductor films. Consequently, the gap between the Fermi level and conduction band minimum was closer in thick semiconductor. Therefore, the potential barrier formed above the conduction band minimum appeared to be relatively low from the perspective of electron [32]. Therefore, as the thickness of InO_x increased, the percolation effect in InO_x decreased, and the band-like transport became dominant. The extracted γ value in the power law model of InO_x-7 was 0.34, and it indicated that the electron transport was governed by the percolation conduction because it was generally understood that the percolation conduction is dominant when γ was close to 0.1 [31]. In several of the studies reported in the literature related to percolation conduction, the γ values were in the range of 0.12 to 0.34, which is comparable to this study [33,34,35,36]. Meanwhile, a negligible change in μ_FE occurred with an increase in V_G in InO_x-9 and InO_x-11. This result implied that controlling the semiconductor thickness at the atomic scale allowed the effective tuning of electrical characteristics. In addition, it was confirmed that InO_x TFTs were saturated in the V_D ≥ V_G − V_T region by output characteristics, as shown in Figure 4c. In addition, the device-to-device uniformity of optimized TFTs InO_x-7 was investigated by measuring 30 devices through the fabrication of three InO_x-7 samples (10 devices per sample), as shown in Figure S5. Figure S5a shows the schematic illustration of fabricated TFT arrays and measurement points used for statistical evaluation. As shown in Figure S5b,c, considering that the devices were fabricated through a solution process, the reasonable high device-to-device uniformity was obtained, although the semiconductor thickness was at the atomic scale [17,37]. This result might be attributed to the fact that the InO_x used in this study had high film quality with few physical and chemical defects due to the densification and condensation effects incurred via water etchant [17].

The electrical performances of atomically thin InO_x TFTs used in this work were benchmarked with recently reported high-performance oxide TFTs, as shown in Figure 5. All of the data presented here were derived from the solution-processed oxide TFTs with SiO₂ dielectrics, since mobility overestimation via high-k dielectrics could affect quantitative comparison. The semiconductor materials, processing temperature, and electrical characteristics presented are in Figure 5 and summarized in Table S1. We noted that the operating conditions, such as biased range or value, are not exactly the same for each study, but almost all of them were driven under the similar conditions that could be acceptable in quantitative comparison. TFTs fabricated in this study showed high μ_FE at a relatively low processing temperature and positive V_T (Figure 5a,b). From an industrial perspective, the processing temperature of 300 °C enabled the utilization of flexible polymer substrates and minimized the process risks. Furthermore, it allowed the back-end-of-line fabrication. Thus, it could be considered to be a sufficiently low processing temperature in the display and semiconductor industries [38]. Furthermore, a positive V_T was preferred to a negative V_T because it was advantageous in circuit design and power consumption [29,30]. As shown in Figure 5c, oxide TFTs used in this work had a superior I_on/off of about 10¹⁰ using the high μ_FE. High I_on/off contributed to the decrease in the leakage current when the transistor was in off state, and the high μ_FE allowed the lowering of the operating voltage to achieve the specific current required to drive the circuit or emit light. Therefore, the high I_on/off and μ_FE enabled an improvement in power efficiency. These comparisons imply that the proposed atomically thin amorphous InO_x TFTs had considerable suitability as a candidate for use in a unit device in next-generation electronic device applications.

Bias stability is one of the most important factors in the commercial use of electronic devices. In this regard, the bias stress test was carried out to demonstrate the bias stabilities of the optimized atomically thin amorphous oxide TFT InO_x-7. To demonstrate the positive bias stress (PBS)-induced instability of the InO_x-7, V_Gs of 10 and 30 V were applied for 3000 s at room temperature, as shown in Figure 6a,b, respectively. A V_D of 0 V was applied during PBS tests. After stress, transfer characteristics were measured at a V_D of 30 V. Compared to PBS at a V_G of 10 V, the PBS at a V_G of 30 V experienced a more severe transfer curve shift due to strong gate bias stress. To understand the PBS-induced instability, variations in V_T, SS, and µ_FE with stress time were extracted (Figure 6c). Regardless of the applied V_G during PBS, V_T shifted positively, while SS did not noticeably change as the stress time increased. In addition, µ_FE gradually decreased with the positive shift in V_T. This result could be interpreted as meaning that the interface traps were not additionally created via bias stress, and the V_T shift originated from the electron trapping at the interface and electron injection into the gate dielectric (Figure 6d) [39,40]. For NBS tests, V_Gs of −10 and −30 V were applied for 3000 s at room temperature, as shown in Figure 6e,f, respectively. The V_D of 0 V was applied during the NBS test, and transfer characteristics were measured at V_D of 30 V, i.e., the same as the PBS tests. A negative shift in the V_T of InO_x-7 was observed using the stressed V_Gs of −10 and −30 V. Interestingly, the change in SS was negligible when the stress V_G was −10 V, while it showed a gradual increase with the increasing stress time when the stress V_G was −30 V (Figure 6g). These different trends imply that when NBS at a V_G of −10 or −30 V was applied to InO_x-7, the devices underwent degradation via different mechanisms. The fact that SS did not increase via NBS at a V_G of −10 V suggests that the V_T shift occurred due to hole trapping and injection rather than the degradation due to defect creation (Mechanism (1) in Figure 6h) [39]. On the other hand, the increase in SS via NBS at a V_G of −30 V indicated the formation of acceptor-like defects during NBS. In general, defects at deep levels, such as V_o, in oxide semiconductors are ionized via illumination stress [39,41]. However, the Fermi level approached the valence band maximum via band bending due to the strong negative gate bias; the formation energy of V_o²⁺ became lower than that of V_o [42]. Two electrons released via the transition from V_o to V_o²⁺ induced a negative shift in V_T. Meanwhile, the V_o²⁺ migrated to the gate dielectric–semiconductor interface via the negative gate bias, thereby acting as an acceptor-like trap (Mechanism (2) in Figure 6h). Therefore, it was reasonable to estimate that the degradation mechanisms caused by NBS with V_G of −10 and −30 V were caused by the hole trapping and injection and V_o ionization, respectively, in solution-processed atomically thin amorphous InO_x TFTs.

4. Conclusions

In this study, we demonstrated high-performance solution-processed oxide TFTs with atomically thin InO_x semiconductors. Based on the linearity between solution molarity and film thickness, the thickness of InO_x was precisely controlled by adjusting the molarity of the solution. As a result, ultrathin and uniform layers of 1.95–5.51 nm were deposited through the solution process. The bandgap of InO_x increased as the thickness decreased due to the quantum confinement effect, and, thus, high μ_FE and I_on/off of 13.95 cm² V⁻¹ s⁻¹ and 1.42 × 10¹⁰, respectively, were obtained in InO_x TFTs at an optimized InO_x thickness of 3.12 nm. Furthermore, atomically thin InO_x TFTs showed superior positive and negative gate bias stress stabilities. Their degradation mechanisms were also investigated by analyzing the change in the electrical parameters via gate bias stress. The proposed atomically thin InO_x TFTs are expected to contribute to the realization of high-performance printed transistors for use in next-generation electronic applications.

Author Contributions

Conceptualization, J.-H.P., D.-K.K. and J.-H.B.; methodology, J.-H.P. and W.P.; validation, J.-H.P.; formal analysis, J.F. and J.-H.N.; investigation, D.-K.K., J.-H.P. and J.L.; data curation, J.-H.P. and J.-S.E.; writing—original draft preparation, J.-H.P.; writing—review and editing, D.-K.K. and J.-H.B.; supervision, D.-K.K. and J.-H.B. All authors have read and agreed to the published version of the manuscript.

Data Availability Statement

Not applicable.

Conflicts of Interest

The authors declare no conflict of interest.

Footnotes

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Figures

Figure 1. Schematic of the process of fabrication used for atomically thin InOx TFTs.

Figure 2. (a) Structures, (b) TEM images and corresponding SAED patterns (inset), and (c) AFM images and corresponding height profiles of InOx thin films at various molarities. (d) InOx film thickness versus molarity. (e) RMS roughness of InOx film versus InOx film thickness.

Figure 3. (a) (αhν)2 versus photon energy, (b) optical bandgap versus thickness, and (c) XPS O 1s spectra of InOx films with various solution molarities.

Figure 4. (a) Transfer characteristics, (b) field-effect mobility, and (c) output characteristics of InOx TFTs with various InOx thicknesses.

Figure 5. Benchmarks of (a) μFE versus processing temperature, (b) μFE versus VT, and (c) log(Ion/off) versus μFE. All works used SiO2 dielectric and solution-processed oxide semiconductors to create TFTs.

Figure 6. PBS with (a) VG = 10 V and (b) VG = 30 V. (c) Change in electrical parameters of InOx TFTs via positive bias stress. (d) PBS-induced degradation mechanism in InOx TFTs. NBS with (e) VG = −10 V and (f) VG = −30 V. (g) Change in electrical parameters of InOx TFTs via positive bias stress. (h) PBS-induced degradation mechanism in InOx TFTs.

Supplementary Materials

The following supporting information can be downloaded via the following link: https://www.mdpi.com/article/10.3390/nano13182568/s1. Figure S1. Proposed chemical reaction mechanism of InO_x by water etchant-based photopatterning method. Figure S2. GIXRD spectra of InO_x thin films with various solution molarities. Figure S3. In, O, and Si element mappings of (a) InO_x-5, (b) InO_x-7, (c) InO_x-9, and (d) InO_x-11 deposited on SiO₂ dielectric. Figure S4. ${I_{\mathrm{D}}}^{\frac{1}{2}}$ – V_G curves and linear fitting of (a) InO_x-5, (b) InO_x-7, (c) InO_x-9, and (d) InO_x-11. Figure S5. (a) Schematic illustration of fabricated TFT arrays and measurement points (red box) for statistical evaluation. (b) Distribution of V_T (top) and μ_FE (bottom) of three InO_x-7 samples. (c) Statistical data of V_T (left) and μ_FE (right) for three InO_x-7 samples (10 points per sample). Table S1. Summary of recently reported solution-processed oxide TFTs with SiO₂ dielectrics and this work. The data are used in Figure 5.

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