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Abstract
The definition and development of the VANDA CAD framework described in this dissertation was motivated by the bottlenecks observed in the design strategy currently prevalent in the industry. The present design process involves two distinct stages. The first stage is algorithm design. The second stage is the translation of the algorithm level description of the system to an architectural implementation, the simulation of this architecture to measure the effects of implementation on system performance and the silicon layout of that architecture. These stages are typically carried out by different design teams using different CAD tools and databases. There is usually a formal hand-off protocol between these stages, e.g. a set of input vectors and the system's corresponding outputs. The long turn-around of this process, together with the uncoupling of the stages due to the formal hand-off, discourages trade-offs and increases the time from concept to a working system.
The goal of the development of the VANDA framework was to increase the productivity of this design process. This was done by: (1) integrating the complete design process from algorithm design to IC design in a single environment; (2) providing CAD tools to map system specification to architectural implementations; and (3) providing tools to automate the design iteration process.
