A methodology of photovoltaic power integration in air conditioning system – An inverter‐less approach

Abstract

The photovoltaic (PV) power generation and cooling demand of the air conditioner are increased along with an increase in solar irradiation. Therefore, considering such fact, in this paper, PV power is integrated with the air conditioner to support the grid. With recent developments in power electronics, the air conditioning systems are operated in variable speed using variable frequency drive (VFD) technology. In this paper, taking the advantage of the VFD technology, PV power is directly injected into the DC bus of VFD using an isolated DC‐DC converter. In this methodology, due to the high‐frequency DC‐DC conversion, high power DC‐AC (50 Hz) stage is eliminated, and seamless power is transferred from PV generation to the load without interrupting the main operation of the air conditioner. Thus, the reliability of the system is enhanced with the reduction in overall cost, conversion losses and bulkiness. With the PV power support, the peak amplitude of the grid current is reduced and consequently the power consumption, reactive power intake from the grid, as well as the harmonics component of the grid current, are reduced. This scheme is used in rural or suburban areas where the solar profile is significant and air conditioner is extensively used.

INTRODUCTION

Air conditioner is one of the major appliances and is extensively used in tropical countries during the summer season. The power consumed by air conditioner load in residential and commercial buildings has a deep impact on the utility grid. With an increase in solar irradiation, the cooling demand of the air conditioner is also increasing significantly. Therefore, a high energy bill has to be paid by the consumer. Photovoltaic (PV) power generation is directly correlated with change in solar irradiation. Therefore, a solution has to be devised that can reduce the stress of the grid due to air conditioning load with the help of PV generation without interrupting the normal operation of the air conditioner. Thus, a methodology of integrating PV power with air conditioning load is proposed in this paper as shown in Figure 1. Recently, the PV panels are getting cheaper in cost with about 25 years of lifetime; therefore, the installation cost of the system is to be compensated with the reduction in the energy bill paid by the consumer.

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With rapid development in semiconductor technology in power electronic devices, intelligent power module (IPM) is introduced in consumer products to make them cheaper, compact in size [1, 2]. Thus, conventional air conditioners are adopted with variable frequency drive (VFD) technology. The main cooling compressor of the air conditioner is driven through an inverter [3], which is made of a compact and integrated power switch like IPM. The inverter is operated in variable frequency to drive the compressor at variable speed. With optimal control of the driving frequency, the starting current of the air conditioner is reduced as well as the efficiency and the overall power consumption [3–5] are improved. Taking the advantage of the VFD technology, in this paper, the PV generation is integrated directly into the DC bus of the VFD using isolated DC-DC converter as shown in Figure 1 to eliminate the high power line frequency (50 Hz) transformer. As the voltage amplitude of PV generation is low and DC in nature, therefore, with help of a DC-DC converter, the voltage level is matched with the grid level and galvanically isolated for safety reasons. However, due to the inverter driven technology, the system behaves like constant power load (CPL) for a fixed operating condition. During transients under voltage at the grid side, current consumption increases because of the negative incremental impedance nature of the VFD. Such an action may result in further reduction of the grid voltage and subsequently, a major voltage instability arises. Such a scenario can be mitigated during peak demand with an external PV power support connected to the DC bus.

The electrical model of an inverter based air conditioner and its dynamic performance, sensitivity and stability analysis are reported in references [4, 6]. Dynamic model and dynamic frequency response of an inverter based air conditioner are studied with change in grid frequency in [7]. The energy economy of the air conditioning system is inadequately reported in the literature. The primary motive of the existing work is concentrated towards using the air conditioner to solve the demand response problem [8, 9]. An artificial intelligence based energy saving control of IoT enabled air conditioners is proposed in [10], where the power consumption is reduced by varying the temperature setting. Such approach is not economical and affects the cooling comfort of the user. In the existing literature, the renewable resources are integrated with air conditioning systems using the DC-AC conversion stage in [11–13]. PV power is used in building energy management with the battery storage and DC-AC converter to form a microgrid structure to support the power consumption from the grid [12, 13]. DC-AC conversion stage requires a bulky high power line frequency transformer to feed the power to the load. In this paper, utilising the modern VFD technology, the DC-AC conversion stage is eliminated, and PV power is directly injected into the DC bus through DC-DC converter to support the utility grid.

The recent inverter-based air conditioner converts the AC power from the utility grid to form a DC bus and then VFD drives the cooling compressor unit. As the magnitude of the output voltage of a single PV panel is low enough (28–35 V) [14], therefore, a wide range and high gain DC-DC converter is required to match with DC bus form using the utility grid voltage (300–360 V). The conventional boost converter is non-isolated and has stability issues at high gain. Full-bridge, half-bridge, push-pull converters offer high gain and galvanic isolation using the turns ratio of the transformer, but such converters are operated in hard switching mode, therefore, the switching and snubber losses are dominant of the converter efficiency [15]. The resonant converter operates in a wide range of frequency variations to achieve zero transition switching but, the optimal design of the output filter and control loop, becomes very difficult and not cost effective. Phase-shifted full-bridge converter (PSFB) is considered for PV power integration, which offers soft switching using parasitic circuit elements and operates in fixed frequency [16].

In this paper, utilising the VFD and DC-DC converter technology, a methodology is proposed to integrate PV power with an air conditioner to support the utility grid as shown in Figure 1. Moreover, the designed PSFB converter is controlled with a maximum power point tracking (MPPT) controller to ensure that the maximum PV power can be fed to the load. This design architecture has the following merits:

• PV power is utilised in grid powered appliances without any DC-AC conversion stages.

• Seamless power can be exchanged between the PV array and utility grid that leads to the uninterrupted operation of the air conditioner during solar irradiation fluctuations.

• The amplitude of the peak current drawn from the grid side is reduced.

• The power consumption from the utility grid is reduced.

• The current harmonics injected to the power line are reduced effectively.

• The reactive power drawn from the grid side is reduced as a result the power factor is improved.

• The cost and the size of the system are reduced with the elimination of the DC-AC conversion stages and high-frequency DC-DC operation.

A small-scale laboratory prototype of the experimental setup is built for the validation of the concept under different cases and conditions.

SYSTEM DESCRIPTION AND OPERATION

The inverter type air conditioner (Figure 1) is divided into two segments, that is, indoor unit and outdoor unit. The indoor unit contains sensors, low power motor for internal fans etc. and the outdoor unit consists of major high power cooling compressor motors, sensor etc. As the majority of the power is consumed by the compressor drive at the outdoor unit so it produces the main support to the grid by integrating the PV generation. The consumed power and refrigerating capacity of the compressor unit can be modelled as [6] 1 $${P}_{\text{COM}}(s)=\frac{{k}_{P}}{1+s{\tau }_{\text{COM}}}{f}_{\text{COM}}(s)+{\mu }_{P}$$ 2 $${Q}_{\text{COM}}(s)=\frac{{k}_{Q}}{1+s{\tau }_{\text{COM}}}{f}_{\text{COM}}(s)+{\mu }_{Q}$$ where, $${P}_{\text{COM}}$$ and $${Q}_{\text{COM}}$$ are the consumed electrical power and the refrigerating capacity of the compressor unit, $${f}_{\text{COM}}$$ is the driving frequency set by the inverter, $${\tau }_{\text{COM}}$$ is the time constant of the compressor, $${k}_{P},{k}_{Q},\,{\mu }_{P},{\mu }_{Q}$$ are the constant coefficients of the air conditioner. Combining (1) and (2), the relationship between the refrigerating capacity and the consumed power can be established as 3 $${Q}_{\text{COM}}(s)=\frac{{k}_{Q}}{{k}_{P}}{P}_{\text{COM}}(s)+\frac{{k}_{P}{\mu }_{Q}-{k}_{Q}{\mu }_{P}}{{k}_{P}}$$

From (1) and (2), it is observed that the cooling capacity and the electrical power consumption depend on the driving frequency of the compressor set by the internal controller of the air conditioner. The cooling demand has a proportional relationship with power fed to the compressor. As $${P}_{\text{COM}}$$ remains constant by the combination of $${I}_{\text{Grid}}$$ and $${I}_{O}$$ therefore, the cooling action is not be interrupted.

Figure 1 depicts the simplified block diagram of the outdoor unit of the inverter based air conditioner. The outdoor unit includes a diode bridge rectifier (DBR) that converts AC from the utility grid to the DC bus and an inverter unit that feeds power to the motor of the compressor system. The inverter unit is controlled by the local logic controller.

Since the PV power is connected with the utility grid side, for safety reasons, an isolated DC-DC converter is used, in which the PV panel is connected at the low voltage input side and high voltage output side is connected to the DC bus of VFD. The primary control loop and supervisory control are implemented at the low voltage side for gate pulse generation and for setting reference voltage and reference current, respectively. Voltage reference ($${V}_{\text{Ref}}$$) is set based upon the grid side voltage fluctuations sensed with help of DBR and the current reference ($${I}_{\text{Ref}}$$) is set according to the maximum power point of the PV array. The isolated voltage and current sensors are connected to the high voltage side, and this generates the output signal according to the sensed voltage and current ($${V}_{M}\,\text{and}\,{I}_{M}$$) at the low voltage side with galvanic isolation and fed to the controller.

The detailed converter with the control block diagram of the complete system is depicted in Figure 2. The output side of the PSFB converter is a buck like structure [17] therefore, the design of the control loop is easily implementable. Moreover, PSFB offers zero voltage switching (ZVS) transitions at the primary side by resonating with the parasitic junction capacitor and leakage inductor of the transformer connected to it [16–19]. Thus, it helps in the reduction of the switching losses at the high power level. It makes the converter design compact, cost effective as well as enhances efficiency. The low voltage side bridge consists of four switches $$\left({Q}_{A}-{Q}_{D}\right)$$ as shown in Figure 2. All the switches, $${Q}_{A}-{Q}_{D}$$ are operated at 50% duty cycle. When there is no phase difference between the two legs of the bridge ($${Q}_{A},{Q}_{B}$$ and $${Q}_{C},{Q}_{D}$$), same voltages cancel each other, and no voltage is generated at the primary side of the interfacing transformer. The average voltage generated at the primary side of the transformer ($${V}_{\text{pri}}$$) is proportional to the amount of the phase shift ($$\phi $$) driven through the bridge. So, the amount of PV power extraction, through the converter is dependent upon $$\,\angle \phi $$, which is the control parameter of the converter.

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The secondary side of the converter is rectified using a diode rectifier and filtered with output LC filter to make a smooth DC current. The output terminal of the converter is connected to the DC bus ($${V}_{O}$$), shown in Figure 1. The amount of current injected into the bus ($${I}_{O}$$) is proportional to the current generated by the PV array ($${I}_{\text{PV}}$$). Therefore, by controlling the amount of $${I}_{O}$$, maximum amount of PV power is extracted. The $${V}_{O}$$ and $${I}_{O}$$ are referred to the low voltage side with an attenuation factor and are fed to the voltage and current control loop and the supervisory controller. The voltage control loop is used for maintaining $${V}_{O}$$ and the current control loop to control $${I}_{O}$$. The control loop is implemented using operational amplifiers configured as type II compensators. The detailed designs of the compensator are discussed in the next section. The values of $${I}_{\text{Ref}}\,\text{and}\,{V}_{\text{Ref}}$$ are set with help of the supervisory control at the outer loop. The supervisory control tracks the fluctuation of $${V}_{O}$$ and generates the $${V}_{\text{Ref}}$$ accordingly and maximises the value of $${I}_{O}$$ by setting $${I}_{\text{Ref}}$$. By perturbing and maximising the value of $${I}_{\text{Ref}},\,$$ maximum power point tracking (MPPT) of the PV array is implemented. The outputs of the current and voltage loops are tied with analogue ORing circuit and produces a single control voltage, for the phase shift modulator. That control voltage is compared with the positive rising ramp signal in the phase shift modulator. The amount of phase is generated at the time stamp where the magnitude of the ramp voltage and the control voltage are matched [20]. The design of voltage and current control loops with help of the PSFB converter model is described in the next section.

CONVERTER MODELLING AND CONTROLLER DESIGN

PSFB is an easily realisable isolated converter topology, which is used for high power application. The inherent ZVS operation of this topology is achieved in coordination with parasitic inductor and junction capacitor of the switch that makes the converter cost effective. For high power operation, switching losses as well as switching stresses get pronounced in conventional full-bridge PWM converter. Moreover, during high-frequency operation, snubbers connected with switches essentially add significant amount of losses in the system. In comparison with the conventional PWM converter, PSFB offers soft switching for all the switches by resonating with the circuit parasitics. The output characteristic of PSFB is similar to buck derivative topology; therefore, the design of current and voltage control loop becomes easy.

Brief description of converter operation

The power stage circuit diagram of the PSFB converter is shown in Figure 2, where $$\,{Q}_{A}-{Q}_{D}$$ are four switches connected in full-bridge configuration. The primary side of the transformer is connected to the output of the bridge having leakage inductance $${L}_{\text{lk}}.$$ The voltage induced at the secondary side of the transformer is rectified with diode and is filtered with the output inductor and capacitor ($${L}_{o},\,{C}_{o}$$) to get a smoothed DC output. Because of MOSFET switching action, the output of the two legs of the bridge ($${V}_{\text{AB}}\,\text{and}\,{V}_{\text{CD}}$$) is switched between $${V}_{\text{PV}}$$ and 0 V with 50% duty interval as shown in Figure 3. As all the switches are operated at 50% duty at the gate signal, the design of the gate driver circuits becomes easier with the gate driver transformer. In order to transfer power, a phase shift of $$\angle \phi $$ is introduced between $${V}_{\text{AB}}\,\text{and}\,{V}_{\text{CD}}$$. The difference in the voltage between two legs appears across the primary side of the transformer as shown in Figure 3. At the secondary side, a high voltage $$\left(n.{V}_{\text{PV}}.D\right)$$ is to be induced, which is rectified and filtered. The switching frequency seen by the secondary side filter is twice the primary side because of the rectification. As a result, the size of the filter is reduced. The current waveform through the transformer is also shown in Figure 3. During the phase shift, $${L}_{\text{lk}}\,$$ resonates with output capacitance of the switches ($${C}_{\text{switch}}$$) and ZVS is achieved within quarter cycle of the resonating period. With proper adjustment of the dead time between $${Q}_{A}\,\& \,{Q}_{B}$$ and $${Q}_{C}\,\& \,{Q}_{D}$$, zero transitions can be configured. The maximum dead time ($$D{T}_{\text{max}}$$) on each leg of the bridge can be expressed as [16] 4 $$D{T}_{\text{max}}=\frac{\pi }{2}\sqrt{{L}_{\text{lk}}{C}_{\text{switch}}}$$

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The detailed design and proper tuning of the dead time are given in [16]. As the voltage level is low in the bridge side, the dead time is taken very low and loss of duty due to dead time is not prominent. Therefore, the loss of duty is ignored in this analysis. This paper focuses on the system level design of the PSFB converter and so brief operation, and the control loop design are discussed.

Power stage modelling

In order to properly tune the control loop with system parameters, power stage modelling of the converter is required. On the secondary side, after rectification, the circuit is similar to the output circuit of the buck converter. So, the power stage of the converter as shown in Figure 2 can be simplified as Figure 4a for analysis. The power stage can be modelled with pulsating unipolar voltage having an amplitude of $$n.{V}_{\text{PV}}$$ and double the switching frequency and the output filter. The equivalent series resistance (ESR) of the capacitor ($${r}_{C}$$) is also considered with output load ($${R}_{O}$$).

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The phase shift angle ($$\phi $$) between two legs of the primary side bridge is converted to duty cycle ($$D$$) with respect to the switching period ($${T}_{s}$$). The power stage modelling is done based on the analysis of the average circuit model presented in [15, 18] considering that the voltage of the PV panel ($${V}_{\text{PV}}$$) is maintained at the maximum power point voltage ($${V}_{\text{MPP}}$$) and the converter is designed to be operated in continuous conduction mode. For small signal analysis of the converter in Figure 4, steady state duty cycle is perturbed with ac small signal $$(\hat{d})$$ and small signal current flowing through the inductor $$({\hat{i}}_{\text{LO}})$$ is considered as the output variable for current control and small change in output voltage $$\left({\hat{v}}_{O}\right)$$ due to small changes $${\hat{i}}_{\text{LO}}$$, is considered as the output variable for the voltage control loop.

The small signal transfer function of the current control loop can be calculated from the circuit shown in Figure 4a as 5 $$\frac{{\hat{i}}_{LO}(s)}{\hat{d}(s)}=n.\frac{{V}_{\text{PV}}}{{R}_{O}}.\frac{1+s{C}_{o}\left(R+{r}_{C}\right)}{{s}^{2}{L}_{O}{C}_{O}\left(1+\frac{{r}_{C}}{{R}_{O}}\right)+s\left(\frac{{L}_{O}}{{R}_{O}}+{r}_{C}{C}_{O}\right)+1}$$

With the help of the circuit shown in Figure 4b, the transfer function of the voltage control loop can be calculated as 6 $$\frac{{\hat{v}}_{O}(s)}{{\hat{i}}_{\text{LO}}(s)}={R}_{O}\frac{1+s{C}_{o}{r}_{C}}{1+s{C}_{O}\left({R}_{O}+{r}_{C}\right)}$$

The frequency domain response of the transfer function (5) and (6) as shown in Figure 5, which is calculated using the power stage parameter given in Table 1.

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TABLE 1 Prototype circuit parameters of PSFB

Parameter	Value
PV module, 2 module in parallel [14]	MPP voltage	30 V
MPP power	570 W @1000 $${\text{W/m}}^{2}$$
Switching frequency	50 kHz
Transformer trans ratio	1:13
LV side leakage inductor	Inductance	1 $$\mathrm{\mu H}$$
DC Resistance (DCR)	15 $$\mathrm{m\Omega }$$
MOSFET: N-Channel NexFET™ power MOSFET	Mfg. Part No.	CSD19536KTT - 100 V, Texas instruments
Secondary side diode	Mfg. Part No.	RHRP15120- 1200 V/15A, 75 ns
Output inductor	Inductance	680 $$\mathrm{\mu H}$$
DCR	120 $$\mathrm{m\Omega }$$
Output capacitor	Capacitance	470 $$\mathrm{\mu F}$$
ESR	150 $$\mathrm{m\Omega }$$

With the help of the open loop Bode diagram of the power stage obtained in Figure 5, proper compensation network for current and voltage loop can be designed.

Control loop design

The circuit diagram of voltage and current control loop is shown in Figure 6. The primary control loop of voltage and current is implemented using two error amplifiers to track the reference voltage and current set through the supervisory control. The secondary control loop is implemented in DSP, which sets $${V}_{\text{Ref}}$$ and $${I}_{\text{Ref}}$$ of the system by measuring $${V}_{M}$$ and $${I}_{M}$$. DSP generates the PWM with controllable duty cycle and the PWM signal is passed through Schmitt triggered buffer to improve noise immunity and low pass filter (LPF) for converting into the analogue form. The PWM frequency is chosen at 10 kHz and the scutoff frequency of LPF is set at 100 Hz. Type II compensator configuration is chosen for control loop compensation. Type II compensator provides more flexibility in pole and zero placement. Therefore, for both the voltage and current loops, the same compensator is used with different pole and zero configuration as shown in Figure 6. The error signal of the output of the two compensators is ORed with $${D}_{I}$$ and $${D}_{V}$$ and it produces a single control signal ($${V}_{\text{con}}$$) for the phase modulator. Because of the ORing and current sinking ability of the used amplifier, only one loop dominates over the other one and the phase modulator responds with that signal only. $${V}_{\text{con}}$$ is compared with the positive rising ramp in the phase modulator and the controlled phase shift is generated between two legs of the bridge.

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Solving the dynamics of the compensator circuit shown in Figure 6, the gain ($${G}_{x}$$), one real pole ($${f}_{Px}$$) and one real zero ($${f}_{Zx}$$) position can be obtained as 7 $$\left.\begin{array}{l}{f}_{\text{Zx}}=\frac{1}{2\pi {R}_{\text{Zx}}{C}_{\text{Zx}}}\,\hfill \\ {f}_{Px}=\frac{1}{2\pi {R}_{\text{Zx}}}\left(\frac{{C}_{\text{Px}}+{C}_{\text{Zx}}}{{C}_{\text{Px}}{C}_{\text{Zx}}}\right)\hfill \\ {G}_{x}=\frac{1}{{R}_{\text{Gx}}\left({C}_{\text{Zx}}+{C}_{\text{Px}}\right)}\hfill \end{array}\right\}$$ where $$Z,\,P$$ indicate the location of zero and pole, respectively placed at the tuning frequency. $$x=I$$, for current control loop and $$x=V$$, for voltage control loop. With help of the power stage response in Figures 5 and (7), the tuning component is calculated.

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The crossover for the current loop is chosen at 5 kHz, which is $$\sfrac{1}{10}$$ of the switching frequency and the crossover frequency of the voltage loop is set at 500 Hz, which is $$\sfrac{1}{10}$$ of the crossover frequency of the current loop. The gain of the compensator circuit $$(\frac{{R}_{\text{zx}}}{{R}_{\text{Gx}}})$$ is tuned such that the gain of the power stage can have at the crossover frequency, which is sufficiently attenuated. Zero is placed near the low frequency, which is far from the pole of the power stage. For the current control loop, $${f}_{\text{ZI}}=42\,\text{Hz}$$ and for the voltage control loop $${f}_{\text{ZV}}=17\,\text{Hz}$$. Pole is placed at the high frequency so that the switching artefacts of the power stages get sufficiently filtered at the control signal. Pole for the current control loop, $${f}_{\text{PI}}=2.5\,\text{kHz}$$ and for the voltage control loop, $${f}_{\text{PV}}=1\,\text{kHz}$$.

The power stage modelling and loop compensation are discussed in this section. The results obtained from the calculation are implemented in hardware. The methodology is verified with different possible cases presented in the next section.

EXPERIMENTAL VALIDATION

A laboratory scale prototype of the system is built as per the block diagram, (Figure 1), to validate the concept. The PSFB converter shown in Figure 2 is designed with the circuit parameters given in Table 1 and compensator is discussed in Section 3. The PV array is realised with a PV emulator, which is configured as two parallel-connected PV panels [14]. A 3450 W (100%) cooling capacity inverter type air conditioner with variable speed compressor is taken for experimental purpose. Different scenarios are experimented to validate the proposed scheme.

Improvement in startup condition

The current drawn from the grid during starting of the air conditioner is recorded in a digital storage oscilloscope (DSO) with and without integration of the PV power, as shown in Figure 7a. When the PV power is not present, the total startup current is drawn from the grid. The startup current profile (Figure 7a) reflects the gradual increase in current with increasing compressor load. When the PV power is injected, because of the seamless operation in power sharing, the PV current follows the load demand of the compressor (Figure 7a, Ch 2) and nominal current is drawn from the grid because of power demand of the indoor unit and biasing circuits. A comparative view of the steady state condition in two cycles of the grid current in both the cases are depicted in Figure 7b. Due to integration of the PV current, the peak magnitude of the current drawn from the grid is significantly reduced. From Figure 8, it is concluded that the current stress and power demand on the grid side are supported by the PV power. The power exchange between the PV panel and the grid are operated seamlessly, without any interruption in the air conditioner operation. During startup condition, the power drawn from the PV panel versus the voltage of the PV panel is plotted in Figure 8. The power signal $$\left({P}_{\text{PV}}\right)$$ is generated with help of the analogue multiplier circuit, which multiplies the output side sensed voltage $$\left({V}_{o}\right)$$ and current $$\left({I}_{o}\right)$$ of the isolated sensor. The power sensitivity is 10 $$\text{W/mv}$$. When no power is drawn from PV panel a small amount of offset voltage is reflected at the output of the analogue multiplier as shown in Figure 8. The PV array power reaches the maximum power point (MPP) as the compressor draws current.

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Change in solar irradiation

The effect in the grid current due to change in the solar irradiation is studied and shown in Figure 9. With the help of the PV emulator, the irradiation is changed step wise (decreased and increased) from 1000 to 400 $${\,\text{W/m}}^{2}$$ and back to 1000 $${\,\text{W/m}}^{2}$$ in the step of 200 $${\,\text{W/m}}^{2}$$ in the interval of 2 s. The grid current and PV current output are observed in the DSO as shown in Figure 9. As per the PV characteristics, the PV current is reduced due to reduction in the solar irradiation. As a result, the injected PV power is also reduced and the grid current is increased. The PV current is changed stepwise but the smooth transition in grid current is observed because of the PSFB converter. When the solar irradiation is increased, in reversed effect, the grid current is also decreased.

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Effect in current harmonics and power quality

The current harmonics due to the air conditioner load at the grid side are investigated. The harmonics that consisted of the grid current is reduced with reduction in the amplitude of the peak current as shown in Figure 10b. Figure 10 depicts the harmonic analysis of the grid current drawn by the air conditioner with and without the PV power support. In the absence of the PV array, the Total Harmonic Distortion (THD) content of the grid current is about 60% and magnitude of the third harmonic current is about 1.06 A. With PV power support, the THD content is reduced drastically to 16.5% and third harmonic current is reduced to 66.77 mA. The variation in third harmonic current with variation in solar irradiation is plotted in Figure 10c. It shows the improvement of current harmonics with increase in solar irradiation.

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The power profile and the phasors are recorded with help of power quality analyser. The phasor and power table at the grid side for the two cases and trend plot of the power profile with change in solar irradiation are shown in Figure 11. The improvement in the voltage and current phasor due to solar power injection is shown in Figure 11a,b. As the PV current is injected into the DC bus, the magnitude of the grid current is reduced and phase angle difference with voltage is also improved. The power table includes all the power quality parameters at the grid side in both the cases as given in Figure 11c,d. Due to the DC power support from the PV panel, the consumption of active power is reduced as well as the reactive power drawn from the grid is also reduced from 514 to 27 var. Overall, the power factor is improved from 0.81 to 0.97. Furthermore, trends of major power quality parameters that is, active power, reactive power, power factor, and root mean square value of the grid current drawn are recorded with stepwise change in solar irradiation. It is observed that power factor deteriorates and the magnitudes of reactive and active power are increased with decreasing solar irradiation.

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These results show that the PV generation support helps in reducing the reactive power intake of the air conditioning system. Increasing insolation level results in more pronounced support in terms of harmonic reduction and improvement in power quality.

Change in load at air conditioner side

The PV panel current supplied through the PSFB converter is reduced as the load demand of the air conditioner is reduced. The grid current and the injected PV current are recorded and shown in Figure 12. When the compressor is turned off through the internal controller of the air conditioner, the current drawn from the PV side is also reduced following the reduction in grid current. As a result, the operating point of the PV panel is shifted from the MPP point towards the open circuit smoothly.

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Effect of voltage fluctuation at grid side

The effect of voltage fluctuation from the grid side on power exchange is investigated. The grid side voltage is perturbed stepwise. Looking from the load point of view, due to the variable speed technology, the internal controller adjusts the operation of the air conditioner so that it behaves like a constant power load. So, when the input voltage dips the magnitude of the current drawn increases and the magnitude of the current is reduced with increasing input voltage.

The effect of voltage fluctuation with PV generation support is studied and the effect on power and current drawn from the grid is shown in Figure 13. Due to PV injection, the change in current drawn from the grid is supported through the PV current and as a result, the current drawn from the grid remains constant even when voltage is fluctuating. So, the power drawn from the grid remains constant and there is no current stress on the power line.

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CONCLUSION

In this work, a methodology to integrate the PV panel power with the air conditioner is discussed, considering the advantage of the variable speed compressor drive technology. The proposed methodology is found capable of providing support to the grid in several aspects, mainly in reduction of power consumption. The methodology consists of a PSFB converter and a power flow controller that utilises the PV power without interrupting the normal operation of the air conditioner. As a result, the current drawn from the grid is significantly reduced, consequently the power consumed from the grid is also reduced. Moreover, apart from the improvement in reactive power drawn, harmonics component of the current, power factor and other power quality issues caused by the air conditioner at the grid side are also improved. The cost and the bulkiness of the system are significantly decreased because of the high-frequency conversion of the isolated DC-DC converter and therefore a seamless power transfer between the grid and the PV generation is achieved. The intermittency of the PV power generation can be compensated with help of battery storage, which is the future scope of this research.

ACKNOWLEDGEMENT

This research work is supported by the Science and Engineering Research Board, (Grant/Award Number: ‘SERB NSC Fellowship’).

CONFLICT OF INTEREST

The authors declare no conflict of interest.

DATA AVAILABILITY STATEMENT

None.

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