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Keysight Technologies, Inc. (NYSE: KEYS) announced today the launch of Chiplet PHY Designer 2025, its latest solution for high-speed digital chiplet design tailored to AI and data center applications. The enhanced software introduces simulation capabilities for the Universal Chiplet Interconnect Express™ (UCIe™) 2.0 standard and adds support for the Open Computer Project Bunch of Wires (BoW) standard. As an advanced, system-level chiplet design and die-to-die (D2D) design solution, Chiplet PHY Designer enables pre-silicon level validation, streamlining the path to tapeout.
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Chiplet PHY Designer provides engineers with an intuitive and integrated chiplet system analysis environment. (Photo: Business Wire)
As AI and data center chips grow more complex, ensuring reliable communication between chiplets becomes crucial for performance. The industry is addressing this challenge through open, emerging standards like UCIe and BoW that define the interconnects between chiplets within an advanced 2.5D/3D package. By adopting these standards and verifying chiplets for compliance, designers contribute to the growing ecosystem for chiplet interoperability,...