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In this paper, we propose a novel design for a NOR gate using a semiconductor optical amplifier combined with a Mach–Zehnder interferometer. By utilizing two inverting input signals, the system achieves the NOR logic function, simplifying the overall architecture and reducing component complexity. The gate’s performance is evaluated at 80 Gb/s, achieving a high-quality factor of 23.47, demonstrating superior signal integrity and reliability. We analyze the influence of key parameters on the gate’s functionality and assess the impact of amplified spontaneous emission on system performance. This study provides a comprehensive evaluation of the NOR gate and contributes to developing efficient, cost-effective solutions for complex optical logic circuits.

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1. Introduction

Optical logic gates are pivotal in the evolution of all-optical signal processing systems, allowing for the potential to overcome the speed limitations inherent in traditional electronic circuits and enabling rapid data transmission, routing, and computing within forthcoming photonic networks. Among these gates, the NOR gate is particularly significant due to its universality; akin to the NAND gate, it can construct any logical function, making it essential for optical computing applications [1,2,3]. A critical component in optical signal processing is the semiconductor optical amplifier (SOA), which amplifies weak optical signals without requiring conversion to electrical signals, thus allowing for high-speed operations and minimizing latency. SOAs are characterized by their compact design, rapid response times, and ease of integration with various photonic devices [4]. On the other hand, the Mach–Zehnder interferometer (MZI) offers notable advantages for optical logic applications, primarily due to its high sensitivity to phase changes, which facilitates effective control over optical signal interference. This characteristic makes the MZI valuable for implementing a range of logical operations, as they can switch states efficiently based on input signals. Additionally, the MZI features low insertion loss and high throughput, enabling rapid signal processing while preserving the integrity of transmitted information. Their scalability and compatibility with other photonic components further support their integration into complex optical systems [5,6]. Furthermore, combining an SOA with an MZI creates a robust configuration that amplifies weak signals, ensuring they remain strong and clear during processing; this synergy significantly enhances the capability to manipulate optical signals at ultra-fast speeds while maintaining high signal integrity, thereby making the SOA-MZI configuration an effective solution for NOR optical logic gates [7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22]. In this study, we propose a novel design for a high-performance NOR gate optimized for operation at 80 Gb/s using an SOA-MZI configuration. This innovative approach employs two inverting input signals as an AND gate to perform the NOR logic function, simplifying the overall circuit compared to conventional methods that typically rely on cascading multiple input signals within a single SOA-MZI. However, while prior designs utilizing an SOA-MZI have demonstrated the functionality of multiple input signals, they often encounter low output signal quality, which indicates compromised signal integrity and heightened error rates [7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22]. By contrast, our design alleviates the need for such complexity, providing a more efficient and cost-effective solution without sacrificing performance. The performance of the proposed NOR gate is evaluated using the quality factor (QF), a crucial metric for assessing the functionality of optical gates. The QF measures signal quality, indicating the clarity of distinction between logic levels and the overall error rates in high-speed operations. Our design achieves an impressive QF of 24.83 at 80 Gb/s, significantly surpassing other designs that typically struggle to maintain higher QFs at such a high speed. Additionally, this paper conducts a thorough analysis of the key operational parameters influencing the gate’s performance, focusing particularly on the impact of amplified spontaneous emission (ASE), a prevalent noise source in SOAs that can degrade the signal-to-noise ratio (SNR) and adversely affect the QF [11]. However, our design mitigates this effect through careful optimization of parameters. By investigating the effects of ASE and other critical parameters, we provide a comprehensive evaluation of the system’s performance, showcasing the advantages of our novel NOR gate design over traditional methods. Moreover, while the proposed design primarily focuses on NOR gates, we recognize the importance of logic gates in emerging computing paradigms. In recent years, NOR gates have found applications in fields such as probabilistic computing, stochastic computing, and neuromorphic computing [23,24]. Probabilistic computing, which leverages randomness for energy-efficient calculations, stochastic computing, which utilizes probabilistic binary representations for efficient data processing, and neuromorphic computing, inspired by neural networks, could all benefit from the high-speed, low-power characteristics of optical NOR gates. These advantages position the optical NOR gate as a promising component for future computing applications, enabling more efficient processing and potentially higher-performance systems in these emerging fields. Moreover, all-optical information processing plays a critical role in quantum communication and computing, particularly in leveraging MZIs for quantum state manipulation and interference-based operations [25]. Recent studies also highlight the importance of optical logic modules, including SOA-MZI configurations, in quantum computing architectures [26,27,28]. While our study focuses on classical optical logic processing, future research could explore the potential of SOA-MZI-based logic gates in quantum optical systems, potentially bridging classical and quantum information processing. In summary, our work demonstrates that the proposed SOA-MZI-based NOR gate not only simplifies the design and reduces component costs but also delivers superior performance at 80 Gb/s, positioning it as a promising solution for future high-speed optical logic circuits and potentially impacting the next generation of unconventional computing paradigms.

This paper is organized as follows: Section 2 introduces the proposed NOR gate design, beginning with Section 2.1, which outlines the operational principles and describes how the SOA and MZI work together to implement the logic function. Section 2.2 presents a numerical analysis, offering insights into the mathematical models and simulations utilized to assess the performance of the proposed scheme. In Section 3, we discuss the results, including a detailed examination of the simulation data, such as the eye diagram and QF, which illustrate the reliability of the system at high data rates. Section 4 compares our SOA-MZI-based NOR design with other existing SOA-based configurations, highlighting its superior performance at 80 Gb/s with a high QF, while also exploring how advances like quantum dot SOAs (QD-SOAs) [29,30,31,32], carrier reservoir SOAs (CR-SOAs) [33], reflective SOAs (R-SOAs) [34,35], photonic crystal SOAs (PhC-SOAs) [36], as well as the incorporation of two-photon absorption (TPA) [37], could further enhance data transmission rates. Section 5 addresses the limitations of the current design and outlines directions for future work, including the exploration of polarization-insensitive designs, the synchronization of input signals, experimental validation of the simulation results, and the integration of advanced SOA technologies for higher data rates. Finally, Section 6 concludes this paper, by summarizing the key findings and emphasizing the significant potential of the proposed NOR gate for high-speed optical logic applications.

2. NOR Gate

2.1. Operation Principle

In the operation of a NOR gate utilizing two inverted signals ( $\bar{A}$ and $\bar{B}$ ) within the SOA-MZI, as illustrated in Figure 1, we employ the same configuration used for the AND gate design [38], with the crucial modification of inverting the input signals A and B (i.e., $\bar{A}$ and $\bar{B}$ ). The inverted signals $\bar{A}$ and $\bar{B}$ are introduced into the system to achieve the NOR function. The $\bar{B}$ signal is first injected into the middle arm of the SOA-MZI via a 3 dB optical coupler (OC), where it combines with the $\bar{A}$ signal, which is injected into the upper arm via a wavelength-selective coupler (WSC). Concurrently, the remaining half of $\bar{B}$ , along with a continuous wave (CW) signal, is directed into the lower arm of the SOA-MZI via another WSC. This configuration is advantageous because the CW signal serves as a stable reference, facilitating consistent interference patterns while eliminating complications introduced by signal delays, thereby enhancing the overall effectiveness of the logic operation. Furthermore, CW signals exhibit greater resilience against interference compared to pulsed signals. The narrow bandwidth associated with CW transmission allows for more selective filtering at the receiver, effectively blocking unwanted noise and preserving the integrity of the signal. This characteristic is crucial in high-speed optical communications, where maintaining a clean signal is vital for accurate data processing [11,18]. When both inverted inputs $\bar{A}$ and $\bar{B}$ are ’1’ (which occurs when the original inputs A and B are both ’0’), constructive interference occurs at the output, resulting in an output of ’1’, as illustrated in the attached NOR truth table alongside Figure 1. Conversely, if either inverted signal is ’0’, the output will be ’0’. For instance, if $\bar{A}$ is ’0’ (indicating that the original input A is ’1’) and $\bar{B}$ is ’1’ (indicating that the original input B is ’0’), the system experiences destructive interference, leading to an output of ’0’. Similarly, if $\bar{A}$ is ’1’ and $\bar{B}$ is ’0’, the output remains ’0’ due to the absence of constructive interference. Thus, the SOA-MZI output produces ’1’ only when both inverted inputs are ’1’ (which means the original inputs A and B are ’0’), effectively defining the A NOR B operation. The inversion of the input signals A and B is the key modification that enables the NOR operation, distinguishing it from the standard AND gate configuration [38]. The highlighted additions clarify the explanation of how the inversion of the input signals A and B is integral to the NOR gate operation, distinguishing it from the AND gate and addressing the comment that the analysis should include the two inverters for the NOR gate. This configuration highlights the capability of SOA-MZI systems to efficiently implement optical logic functions while maintaining high performance and reliability.

The inverters in the optical NOR gate exhibit propagation delays, which arise primarily from the switching characteristics of the SOA and the response time of the MZI. In this configuration, the inversion of the input signals A and B is achieved by modulating the CW signal through the SOA. The resulting inverted signals, $\bar{A}$ and $\bar{B}$ , are then processed through the MZI setup, where they interfere to generate the desired NOR output. The propagation delay is mainly due to the time required for the signals to traverse the MZI arms and the switching times associated with the SOA. At the operating data rate of 80 Gb/s, these propagation delays are minimal and do not significantly affect the NOR gate’s performance. However, at higher data rates, particularly beyond 100 Gb/s, the cumulative delay may begin to affect the overall signal integrity, potentially becoming a limiting factor for high-speed operations. To mitigate this, optimizing the SOA parameters, such as gain recovery time, and adjusting the MZI structure to reduce signal path lengths could help minimize these delays at elevated data rates. This consideration becomes crucial for maintaining efficient logic operations and preventing performance degradation at ultra-high data rates. Therefore, while propagation delays are not a critical concern at 80 Gb/s, they should be carefully managed in the design to ensure robust performance at higher speeds.

The experimental validation of the NOR gate operation involves generating data inputs A and B using a rational harmonic mode-locked (ML) laser and a gain-switched distributed feedback (DFB) laser. These lasers produce ultra-short pulses with a width of 3.5 ps at repetition rates of 20 GHz and 40 GHz, respectively [4]. Both laser systems are synchronized and driven by a shared 10 GHz RF synthesizer. To ensure sufficient signal power, the pulse trains are amplified using erbium-doped fiber amplifiers (EDFAs) to achieve an average power of 10 dBm for each data stream. The inverted signals $\bar{A}$ and $\bar{B}$ are generated through cross-gain modulation (XGM) of a CW light source at 1550 nm in an SOA. These modulated CW signals are directed into an MZI for the logic operation, where precise interference is achieved by managing delays and phase shifts within its arms. A 3 dB OC splits the $\bar{B}$ signal into two paths: one is combined with the CW signal and routed to the lower arm of the MZI via a WSC, while the other is sent to the middle arm. Concurrently, the $\bar{A}$ signal enters the upper arm of the MZI through another WSC. At the MZI output, a narrowband optical filter selects the required wavelength, eliminating noise and ensuring signal clarity. To analyze the system’s performance, an optical spectrum analyzer (OSA) evaluates characteristics such as power levels, spectral width, and signal quality, while a digital communications analyzer (DCA) measures the output waveform. The DCA provides detailed insights into timing, logic levels, and signal integrity, with metrics such as the QF used to verify the precision and efficiency of the NOR gate at data rates as high as 80 Gb/s.

2.2. Numerical Analysis

The coupled equations in SOAs provide a detailed representation of the interplay between carrier dynamics and the optical field, highlighting key phenomena such as carrier heating (CH) and spectral hole burning (SHB). CH occurs as carriers absorb energy from an optical pulse, leading to a redistribution of energy across the conduction band and a temporary increase in temperature. This process typically unfolds over a timescale of approximately 0.1 to 0.7 ps, significantly affecting the amplification characteristics of the SOA. By contrast, SHB results in a localized reduction of gain at specific photon energies, creating a ’hole’ in the gain spectrum. This phenomenon is even more rapid, occurring within a timescale of about 0.3 to 0.6 ps, and is followed by the recovery of the gain profile through carrier redistribution. Both CH and SHB are critical factors that influence the dynamic gain and saturation behavior of SOAs, making a thorough understanding of these processes essential for optimizing SOA performance in high-speed optical communication and advanced signal processing applications [4,9].

(1) $\frac{d h_{C D} (t)}{d t} = \frac{h_{0} - h_{C D} (t)}{τ_{C}} - (e x p [h_{C D} (t) + h_{C H} (t) + h_{S H B} (t)] - 1) \frac{P_{i n, S O A} (t)}{E_{s a t}}$

(2) $\frac{d h_{C H} (t)}{d t} = - \frac{h_{C H} (t)}{τ_{C H}} - \frac{ε_{C H}}{τ_{C H}} (e x p [h_{C D} (t) + h_{C H} (t) + h_{S H B} (t)] - 1) P_{i n, S O A} (t)$

(3) $\frac{d h_{S H B} (t)}{d t} = - \frac{h_{S H B} (t)}{τ_{S H B}} - \frac{ε_{S H B}}{τ_{S H B}} (e x p [h_{C D} (t) + h_{C H} (t) + h_{S H B} (t)] - 1) P_{i n, S O A} (t) - \frac{d h_{C D} (t)}{d t} - \frac{d h_{C H} (t)}{d t}$

Here, the unsaturated power gain of the SOA is expressed as G₀ = exp[h₀] = ɑΓ(Iτ_c/eV − N_tr)L, where ɑ represents the differential gain, Γ is the optical confinement factor, and I denotes the injection current. Here, τ_c is the carrier lifetime, e is the electron charge, and V = wdL signifies the volume of the active layer, with w and d being its width and thickness, respectively. Additionally, N_tr is the transparency carrier density, and L indicates the length of the active region. The saturation energy, E_sat, is given by E_sat = P_sat τ_c = wdhυ/αΓ, where P_sat is the saturation power, h is Planck’s constant, and hυ represents the energy of the photon. The relaxation times resulting from carrier heating and spectral hole burning are indicated by τ_CH and τ_SHB, respectively. The nonlinear gain suppression factors associated with these phenomena are denoted as ϵ_CH and ϵ_SHB. For optimal performance of SOAs, careful adjustment of input signals and device parameters is crucial. This adjustment is typically achieved through comprehensive numerical simulations, often using materials like InGaAsP/InP, recognized for their direct band-gap properties [4]. The total input power, P_in, significantly influences the performance of the SOA. The input data signals $\bar{A}$ and $\bar{B}$ are modeled as Gaussian-shaped return-to-zero pulses, characterized by energy E₀, a full-width at half-maximum (FWHM) pulse width, τ_FWHM, a period T (the inverse of the operating data rate), and a pseudorandom binary sequence (PRBS) length denoted as n [4,9]. The unsaturated power gain, G₀, is given by the following expression:

(4) $P_{\bar{A}, \bar{B}} (t) \equiv P_{i n} (t) = \sum_{n = - \infty}^{n = + \infty} a_{(n \bar{A}, \bar{B})} \frac{2 \sqrt{\ln (2)} E_{0}}{\sqrt{π} τ_{F W H M}} \exp [- \frac{4 \ln (2) {(t - n T)}^{2}}{τ_{F W H M}^{2}}]$

where E₀ is the input signal energy and

a_{(n \bar{A}, \bar{B})}

denotes the n-th pulse, representing the logical states of

\bar{A}

and

\bar{B}

with possible values of either ’1’ or ’0’.

In the proposed configuration for executing the NOR function, the input optical powers directed into the SOA-MZI are expressed as follows:

(5) $P_{i n, S O A_{1}} (t) = P_{\bar{A}} (t) + 0.5 P_{\bar{B}} (t)$

(6) $P_{i n, S O A_{2}} (t) = P_{C W} + 0.5 P_{\bar{B}} (t)$

The gain for each SOA can be determined using the following formula [4,9]:

(7) $G_{S O A_{i}} (t) = e x p [h_{A R} (t) + h_{C H} (t) + h_{S H B} (t)], i = 1, 2$

The expression that describes the phase shift experienced by $\bar{B}$ within the SOA is given by the following equation [4,9]:

(8) $Φ_{S O A_{i}} (t) = - 0.5 (α h_{A R} (t) + α_{C H} h_{C H} (t)), i = 1, 2$

where α is the traditional linewidth enhancement factor (α-factor) and α_CH is the CH linewidth enhancement factor. It is worth mentioning that the contribution of the SHB linewidth enhancement factor is assumed to be negligible, i.e., α_SHB = 0 [4,9].

Consequently, the output power of the NOR function generated at the SOA-MZI output is defined by the following formula [4]:

(9) $P_{o u t, N O R} (t) = 0.25 P_{B} (t) (G_{S O A_{1}} (t) + G_{S O A_{2}} (t) - 2 \sqrt{G_{S O A_{1}} (t) G_{S O A_{2}} (t)} \cos [Φ_{S O A_{1}} (t) - Φ_{S O A_{2}} (t)])$

The QF is used here to assess the NOR performance by determining how well the device distinguishes between logic ’1’ and ’0’ states. The QF is defined as $Q F = {(P}_{1} - P_{0}) / {(σ}_{1} + σ_{0})$ , where P₁ and P₀ are the average peak powers of the logic ’1’ and ’0’ states, while σ₁ and σ₀ represent the standard deviations of these peaks [4,9]. A higher QF indicates greater separation between the logic states, leading to more reliable operation. For the system to perform efficiently, a QF of at least 6 is required, which ensures a bit error rate (BER) of less than 10⁻⁹ [39]. This value serves as a threshold for acceptable performance, allowing the optical logic functions to maintain accuracy in high-speed communication systems. In this study, Equations (1)–(9) were solved using the Adams method in Wolfram Mathematica^®. This method, known for its predictor–corrector mechanism, allows for precise integration of complex time-dependent differential equations. The parameters listed in Table 1 [4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39], derived from practical SOA values, are critical for assessing the NOR gate’s performance and modeling system behavior accurately. To enhance the realism of our simulation, we incorporated a significant number of parameters from the experimental setups described in previous studies [3,8,11,14,15,16,17,18,19,20,21,22,23]. This approach ensures that our findings are grounded in practical scenarios and accurately represent conditions typically encountered in real-world applications.

3. Analysis and Discussion

Figure 2 illustrates the results of simulating the NOR logic gate using the SOA-MZI configuration at a data rate of 80 Gb/s. The analysis includes three key aspects: the input signals, the NOR gate output, and the corresponding eye diagram. The eye diagram reveals a well-formed and clear pattern, with a wide-open eye, signaling strong signal clarity and minimal distortion. This large eye-opening serves as an indicator of the system’s stability and reliable performance in high-speed operations. The sharpness of the eye diagram suggests that the NOR gate effectively mitigates noise and inter-symbol interference, which are critical factors in maintaining high-speed data transmission. Furthermore, the simulation results demonstrate a QF of 23.47, underscoring the system’s excellent performance. Such a high QF reflects the gate’s ability to differentiate between logic levels with minimal error, ensuring high signal fidelity and efficient processing of data, even at the challenging speed of 80 Gb/s. This level of performance makes the SOA-MZI-based NOR gate a promising solution for optical communication systems requiring fast, reliable logic operations.

To explore the dependence of the QF on the $\bar{B}$ wavelength $(λ_{\bar{B}})$ for the NOR gate using an SOA-MZI configuration at 80 Gb/s, we observe that selecting 1563.9 nm yields a QF of 23.47, indicating effective signal amplification. As the wavelength is varied, the QF exhibits a nonlinear response characterized by an initial increase as the wavelength approaches the SOA’s optimal gain region, where improved signal clarity enhances the distinction between logic states. However, moving away from this optimal range—towards either shorter or longer wavelengths—results in a decline in the QF due to reduced amplification and increased noise, ultimately affecting the SNR. This behavior is expected to produce a bell-shaped curve, with the peak QF indicating the most favorable wavelength for performance, as shown in Figure 3. Identifying this optimal wavelength range, likely between 1520 nm and 1580 nm, achieving acceptable QFs, is crucial for ensuring reliable logic operations in practical applications [40]. Notably, the wavelength of signal B plays a significant role in this design, and we have already examined how the QF varies with signal B’s wavelength. While the choice of $λ_{\bar{B}}$ near 1556 nm could potentially yield good QF performance, it does not necessarily represent the optimal operating point, as different wavelengths for signals A, B, and CW are chosen to optimize their distinct roles in the NOR gate operation. Specifically, the wavelength selection for signal B is influenced by the need to avoid gain saturation in the SOA, ensuring maximum amplification and signal clarity. While λB near 1556 nm could theoretically yield a good QF, it does not consider the performance synergy needed between all signals. This analysis emphasizes the importance of careful wavelength selection in maximizing the performance of optical logic circuits.

To analyze the relationship between the QF and the input power of the $\bar{B}$ signal $(P_{\bar{B}})$ for the NOR gate using the SOA-MZI configuration at 80 Gb/s, we begin with an input power level of −3.69 dBm, which yields a QF of 23.47. This power level is critical for achieving optimal signal amplification while minimizing noise contributions, enhancing both signal clarity and reliability. As we examine the data, it becomes evident that increasing the input power corresponds with a consistent decrease in the QF, contrary to typical expectations of signal amplification. The results indicate that as the input power rises, the QF diminishes steadily, reflecting increasing noise levels and potential saturation effects within the SOA. Specifically, the QF values drop from 30.45 at −10 dBm to a mere 0.5667 at 4 dBm, demonstrating a clear trend of deteriorating signal quality at higher input powers. This decline can be attributed to several factors, including saturation effects in the SOA and elevated noise levels, particularly from ASE, which adversely affect the SNR. As input power exceeds optimal levels, the impact of noise becomes increasingly detrimental, overshadowing the potential benefits of amplification [41,42,43]. The QF behavior indicates the critical need for carefully controlling input power, particularly for the $\bar{B}$ signal, which is central to this NOR gate design. By contrast, the input powers for signals A and CW are chosen differently, given their specific roles in the operation of the optical NOR gate. The distinction in input powers ensures that signal B remains in the optimal amplification range while mitigating excessive noise and saturation from the SOA. This careful power management ensures that signal B benefits from optimal gain while avoiding degradation from excessive noise. This behavior is illustrated in Figure 4, which presents the QF as a function of the $\bar{B}$ input power. The data clearly shows a downward trend in the QF with rising input power, emphasizing the importance of carefully managing input levels to avoid significant performance degradation. Understanding this relationship is crucial for optimizing the design and functionality of optical logic circuits, ensuring reliable operation in practical applications. Furthermore, while the analysis focuses on the relationship between the QF and input power, it is important to consider the power consumption and footprint of the proposed optical logic gate compared to electronic NOR gates. Electronic NOR gates, which are typically implemented using CMOS technology, offer highly compact designs with low power consumption. They typically operate in the range of tens to hundreds of milliwatts (mW) for high-speed applications. However, the optical NOR gate, while requiring more power due to the inherent losses in the SOA and MZI components, could still be competitive in terms of speed, particularly for high-speed applications requiring operations in the Gb/s range. Although optical gates consume more power, future advancements in optical device technologies are expected to improve power efficiency. Additionally, when considering the metric of GHz/mW, the optical NOR gate might still offer advantages, particularly in high-speed logic circuits. Future research will aim to quantify these comparisons in greater detail to explore the potential trade-offs between speed, power consumption, and scalability in both optical and electronic logic gates.

The relationship between the QF and ASE is crucial in the performance of a NOR gate using an SOA-MZI at high data rates like 80 Gb/s. As shown in Figure 5, the QF, which measures signal integrity, is highly sensitive to ASE, a noise byproduct of the SOA’s amplification process. ASE arises from the random emission of photons during amplification, reducing the SNR and introducing distortion, which degrades the QF and the overall system performance [41,42,43]. At such high speeds, even minor increases in ASE can cause significant degradation in the NOR gate’s performance. The ASE noise is numerically added to account for its impact on the QF in the simulation [4,12]. Mitigation strategies like optical filtering and optimized SOA bias currents are essential to counteract ASE effects and preserve a high QF, ensuring reliable optical gate operations at high speeds [41,42,43].

As shown in Figure 6, the results indicate a consistent decline in the QF as the data rate increases, highlighting a degradation in signal quality at higher speeds. Specifically, at 120 Gb/s and beyond, the QF drops below the acceptable threshold (QF < 6), which typically corresponds to a BER greater than 10⁻⁹, making error-free operation increasingly challenging. This degradation is primarily attributed to several factors, including gain saturation in the SOA, which limits amplification efficiency as the gain recovery time becomes insufficient at higher speeds, leading to increased pattern-dependent distortions. Additionally, ASE noise accumulates within the system, degrading the SNR and further impacting the QF. Furthermore, nonlinearities such as XGM and XPM become more pronounced at higher data rates, introducing additional signal distortions [4]. To extend the NOR gate’s operational range beyond 100 Gb/s while maintaining a high QF, several optimizations are necessary. These include employing advanced SOA designs such as QD-SOAs [29,30,31,32] or CR-SOAs [33] to enhance gain recovery dynamics, optimizing the SOA bias current and pumping conditions to improve carrier replenishment, and implementing narrowband optical filtering to suppress ASE noise. Additionally, reducing SOA length can mitigate carrier depletion effects, leading to faster carrier recovery and improved performance at elevated data rates. The incorporation of TPA within the SOA-MZI structure is another promising approach to counteract performance degradation at higher speeds, as TPA-based nonlinearities can provide additional signal discrimination, reducing pattern effects and enhancing the QF. Furthermore, integrating TPA-enhanced semiconductor waveguides can help suppress unwanted background noise and improve contrast between logic levels, leading to better QF performance at ultra-high data rates [37]. While the SOA-MZI configuration is central to the NOR gate’s operation, the performance of the associated inverters could become a bottleneck at high data rates, particularly if the QF falls below the required threshold. As data rates increase, signal distortion due to nonlinearities, saturation, and noise may reduce the inverter’s ability to properly distinguish logic levels, impacting the overall NOR gate’s efficiency. This issue may become more pronounced in high-speed operations (e.g., above 120 Gb/s), where inverter performance must also be considered alongside the SOA’s behavior. Optimizing inverter designs, by using low-noise, high-speed materials and architectures, for example, could help alleviate this potential bottleneck. Based on the observed QF trends, the practical performance limit of the current SOA-MZI-based NOR gate is approximately 100 Gb/s, beyond which QF values drop significantly. However, with the aforementioned improvements, we estimate that reliable operation can be extended beyond 120 Gb/s and potentially up to 160 Gb/s with optimized SOA designs, TPA-based enhancements, advanced optical processing techniques, and improved inverter architectures. The evaluation at 80 Gb/s provides a useful benchmark for high-speed optical logic operations, but the additional results demonstrate that performance degradation occurs at higher data rates due to ASE noise, gain saturation, nonlinear effects, and potential inverter limitations. Future work will focus on optimizing SOA parameters, implementing TPA-enhanced architectures, improving inverter design, and exploring hybrid integration strategies to enhance the QF and extend operational limits, which will be crucial for enabling scalable, high-speed optical logic processing in next-generation communication systems.

4. Comparison

The development of integrated photonic logic gates has been extensively investigated, with various implementations demonstrating key performance metrics such as extinction ratio (ER) and quality factor (QF) at different data rates. Photonic logic gates based on SOAs have been explored due to their ultra-fast switching speeds and potential for integration into optical processing systems. Previous studies have experimentally demonstrated logic functions using SOA-based interferometers, quantum dot SOAs (QD-SOAs), carrier reservoir SOAs (CR-SOAs), and photonic crystal SOAs (PhC-SOAs), among others. For instance, SOA-MZIs have been widely studied, with experimental results showing QF values ranging from 5.86 at 10 Gb/s [12] to 7.4 at 100 Gb/s [10]. Additionally, QD-SOA-MZI configurations have achieved improved performance, demonstrating QF values exceeding 14 at speeds up to 1000 Gb/s [31,32,33,34]. Carrier reservoir SOAs (CR-SOAs) have been proposed as an alternative to mitigate gain recovery limitations, exhibiting QF values of approximately 14 at 120 Gb/s [35]. Similarly, photonic crystal SOA (PhC-SOA) architectures have demonstrated QF values of 21.1 at 160 Gb/s, benefiting from enhanced optical confinement [39]. These experimental benchmarks establish a clear reference for evaluating the performance of our proposed SOA-MZI-based NOR gate. The performance of the proposed NOR gate was analyzed and compared against these existing configurations. Our results demonstrate a QF of 23.47 at 80 Gb/s, surpassing several previous experimental and simulation-based studies. Compared to conventional SOA-MZI implementations, which achieved QF values of 15.4 at 80 Gb/s [9] and 8.2 at 80 Gb/s [13], our design offers significantly enhanced performance. This improvement is attributed to optimized input power levels and careful selection of operational wavelengths, ensuring superior signal amplification with minimal pattern effects. Furthermore, Table 2 summarizes the comparative analysis of different SOA-based photonic logic gates, highlighting their operating speeds, methodologies, and key performance metrics. While some configurations prioritize the extinction ratio (ER) as a primary metric, our study emphasizes the QF, as it provides a more comprehensive assessment of signal distinction and error minimization in optical logic operations. The results confirm that the proposed SOA-MZI-based NOR gate achieves a higher QF than most previously demonstrated SOA-based configurations, reinforcing its potential for high-speed optical processing applications.

5. Limitations and Future Work

While our proposed NOR gate design offers promising performance, there are certain limitations that need to be addressed for practical implementation. One such limitation is the polarization dependence of the SOA. SOA-based devices can exhibit varying gain and nonlinearities depending on the polarization state of the input signals. This polarization sensitivity may lead to performance degradation, and thus, polarization-insensitive designs and optical polarization controllers will be explored in future work. Another challenge is the synchronization of input signals. Accurate synchronization is crucial, especially at high speeds, as mismatched timing between the input signals could result in errors in logic output. We aim to integrate synchronization techniques, such as clock recovery circuits or precise pulse shaping, to ensure accurate and reliable NOR logic operations. Future research will focus on matching the simulation results with measurements from actual SOA devices, which will help us verify the accuracy of the model and take into account device imperfections and environmental influences not fully captured in simulations. We will also explore the potential of advanced SOA technologies and investigate further optimization for even higher data rates.

6. Conclusions

We proposed a novel NOR gate design utilizing an SOA in conjunction with an MZI, achieving a high QF of 23.47 at 80 Gb/s. This innovative approach simplifies the circuit architecture and reduces power consumption compared to traditional multi-SOA designs, showcasing significant potential for high-speed optical logic applications. Our study investigated the effects of input signal wavelength and power on the QF, revealing critical insights into optimizing performance. Furthermore, we examined the impact of ASE, emphasizing its role in maintaining a high QF and ensuring reliable operation at elevated data rates. This method provides better performance and scalability for future high-speed optical circuits, paving the way for more compact and cost-effective designs. While the simulation results were derived from existing experimental data, we acknowledge the importance of experimental verification to confirm the accuracy of the model. To this end, future research will include the experimental matching of the simulation model with measurements from actual SOA devices, which will help ensure the practical applicability of our proposed design. This experimental validation will also allow us to assess additional factors, such as device imperfections and environmental influences that are not fully captured in the simulations. Furthermore, future work will extend this design to even higher data rates and explore advanced SOA technologies to enhance performance.

Author Contributions

Conceptualization, A.K.; data curation, A.K.; formal analysis, A.K.; funding acquisition, A.K.; investigation, A.K. and K.E.Z.; methodology, A.K.; project administration, A.K.; resources, A.K.; software, A.K.; supervision, W.C.; writing—original draft, A.K.; writing—review and editing, A.K., K.E.Z. and W.C. All authors have read and agreed to the published version of the manuscript.

Institutional Review Board Statement

Not applicable.

Informed Consent Statement

Not applicable.

Data Availability Statement

Data are contained within the article.

Acknowledgments

A.K. and W.C. would like to extend their heartfelt thanks to the Xi’an Jiaotong-Liverpool University Research Development Fund (RDF-23-02-001) and the Jiangsu Province Department of Education (EFP10120240023) for their vital support.

Conflicts of Interest

The authors declare no conflicts of interest.

Footnotes

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Figures and Tables

View Image - Figure 1. The diagram setup of a NOR gate utilizing two inverted signals ([Forumla omitted. See PDF.] and [Forumla omitted. See PDF.]) within the SOA-MZI.

Figure 1. The diagram setup of a NOR gate utilizing two inverted signals ([Forumla omitted. See PDF.] and [Forumla omitted. See PDF.]) within the SOA-MZI.

Figure 2. The output pulse profile for the NOR operation utilizing the SOA-MZI configuration at 80 Gb/s, achieving a QF of 23.47. This figure illustrates (a) input signal A, (b) input signal B, (c) NOT A ([Forumla omitted. See PDF.]), (d) NOT B ([Forumla omitted. See PDF.]), (e) the NOR output, and (f) the corresponding eye diagram.

View Image - Figure 3. The QF versus the wavelength of signal [Forumla omitted. See PDF.] [Forumla omitted. See PDF.] for the NOR gate employing the SOA-MZI configuration at 80 Gb/s.

Figure 3. The QF versus the wavelength of signal [Forumla omitted. See PDF.] [Forumla omitted. See PDF.] for the NOR gate employing the SOA-MZI configuration at 80 Gb/s.

View Image - Figure 4. The QF versus the power of signal [Forumla omitted. See PDF.] [Forumla omitted. See PDF.] for the NOR gate employing the SOA-MZI configuration at 80 Gb/s.

Figure 4. The QF versus the power of signal [Forumla omitted. See PDF.] [Forumla omitted. See PDF.] for the NOR gate employing the SOA-MZI configuration at 80 Gb/s.

Figure 5. The QF versus the ASE power for the NOR gate employing the SOA-MZI configuration at 80 Gb/s.

Figure 6. The QF versus the data rate for the NOR gate employing the SOA-MZI configuration.

Table 1

Default simulation parameters [4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39].

Symbol	Definition	Value	Unit
E₀	Pulse energy	0.07	pJ
τ_FWHM	Pulse width	1	ps
T	Bit period	12.5	ps
n	PRBS length	127	-
$λ_{\bar{A}}$	$\bar{A}$ wavelength	1549.32	nm
$λ_{\bar{B}}$	$\bar{B}$ wavelength	1563.9	nm
λ_CW	CW wavelength	1555.75	nm
$P_{\bar{A}}$	$\bar{A}$ input power	−3.96	dBm
$P_{\bar{B}}$	$\bar{B}$ input power	−3.69	dBm
P_CW	CW input power	−2.67	dBm
I	Injection current	300	mA
P_sat	Saturation power	30	mW
τ_c	Carrier lifetime	200	ps
α	α-factor	5	-
α_CH	CH linewidth enhancement factor	1	-
α_SHB	SHB linewidth enhancement factor	0	-
ε_CH	CH nonlinear gain suppression factor	0.1	W⁻¹
ε_SHB	SHB nonlinear gain suppression factor	0.1	W⁻¹
τ_CH	Temperature relaxation rate	0.3	ps
τ_SHB	Carrier-carrier scattering rate	0.1	ps
Γ	Confinement factor	0.3	-
α	Differential gain	10⁻²⁰	m²
N_tr	Transparency carrier density	10²⁴	m⁻³
L	Active region length	500	μm
d	Active region thickness	0.3	μm
w	Active region width	3	μm
G₀	Unsaturated power gain	30	dB
N_sp	Spontaneous emission factor	2	-
B₀	Optical bandwidth	3	nm

Table 2

Comparison of NOR gate implementations employing various SOA-based schemes and operating speeds.

Ref.	Scheme	Speed (Gb/s)	Methodology	Metric
[3]	SOA-DI	20	Experimental	ER = 10 dB
[7]	SOA	40	Simulation	ER = 20.285 dB
[9]	SOA-MZIs	80	Simulation	QF = 15.4
[10]	SOA	100	Experimental	QF = 7.4
[11]	SOA-MZI	10	Simulation	QF = 6.9
[12]	SOA-MZI	10	Experimental	QF = 5.86
[13]	SOA-MZI	80	Simulation	QF = 8.2
[14]	SOA	40	Experimental	QF = 6.5
[15]	SOA-MZI	40	Simulation	QF = 10
[16]	SOA	1.25	Experimental	ER = 8.5 dB
[17]	SOA-MZI	10	Experimental	ER = 15 dB
[18]	SOAs-MZIs	10	Experimental	ER = 15 dB
[19]	SOA-DI	40	Experimental	ER = 10 dB
[20]	SOA	10	Experimental	ER = 10.3 dB
[29]	QD-SOA-MZI	1000	Simulation	QF = 14.3
[29]	QD-SOA-MZI-DI	1000	Simulation	QF = 21
[30]	QD-SOA-MZI	250	Simulation	QF = 17.3
[31]	QD-SOA-MZI	160	Simulation	ER = 10 dB
[32]	QD-SOA-MZI	160	Simulation	ER = 12 dB
[33]	CR-SOA-MZI	120	Simulation	QF = 14
[34]	R-SOA	200	Simulation	ER = 14 dB
[35]	R-SOA-MZI	120	Simulation	QF = 17.5
[36]	PhC-SOA-MZI	160	Simulation	QF = 21.1
[37]	SOA-MZI-TPA	250	Simulation	QF = 12
This work	SOA-MZI	80	Simulation	QF = 23.47

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