Content area

Abstract

Recent advances in wired and wireless networks and the growth of connected devices drive our current-day world. Due to increased network capacity in 5G networks, the device edge now generates a massive volume of streaming data. In comparison, the stream processing layer needs higher computing power to sustain the required quality of service (QoS). Edge streaming applications are designed based on the dataflow programming model, directing data toward in-situ operations. The more complex the workload is, the more computing power we need. With the additional tight latency requirement for data-heavy environments, using cloud infrastructure to deploy these services leads to performance and timing losses while raising concerns about localized data.

Modern programmable networking devices provide high-speed match-action processing to support higher bandwidth network operations in data centers. However, their inability to support complex compute functions, limited memory, and the low-level programming interface that demands expertise, make them unsuitable for streaming infrastructures. With the need for dynamic and scalable deployments for streaming workloads, the costs outweigh the benefits for these devices. This dissertation investigates how to achieve high QoS for high data-rate streaming edge applications using smart network compute elements. We address the insufficiency of general-purpose processing power near edge data sources, closer to data packets in the network stack, and present a bump-in-the-wire NIC design.

We propose a multi-core NIC design to support fast packet processing besides general-purpose data processing. Hardware modules provide fast packet processing, and RISC-V cores provide general-purpose computing, delivering hardware acceleration and low-effort user programmability, making it more appropriate for stream processing. We follow an event-triggered computation model and deploy dataflow graphs in a tightly coupled hardware-software infrastructure. Thus, we use low-overhead task execution, scaling computation, and deterministic function execution to manage workload requirements and infrastructure characteristics.

Details

1010268
Title
Enabling Low-Latency High-Throughput Real-Time Stream Processing Using Smart Network Compute Elements
Author
Number of pages
127
Publication year
2025
Degree date
2025
School code
0093
Source
DAI-B 87/1(E), Dissertation Abstracts International
ISBN
9798290901817
Committee member
Lukefahr, Andrew; Dalkilic, Mehmet; Sharma, Prateek; D'Alessandro, Luke
University/institution
Indiana University
Department
Intelligent Systems Engineering
University location
United States -- Indiana
Degree
Ph.D.
Source type
Dissertation or Thesis
Language
English
Document type
Dissertation/Thesis
Dissertation/thesis number
32164444
ProQuest document ID
3234926350
Document URL
https://www.proquest.com/dissertations-theses/enabling-low-latency-high-throughput-real-time/docview/3234926350/se-2?accountid=208611
Copyright
Database copyright ProQuest LLC; ProQuest does not claim copyright in the individual underlying works.
Database
ProQuest One Academic