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Heterogeneous multiprocessor systems-on-chip (MPSoCs) have emerged as a solution to address both the physical limitations of miniaturizing processing cores and the growing computational demands of modern embedded systems. These MPSoCs incorporate numerous heterogeneous processing resources and must often manage applications that experience dynamic workload fluctuations during execution. Optimizing the execution of such dynamic real-time applications on large, heterogeneous architectures presents a complex multi-objective challenge. Tis challenge involves balancing task mapping and dynamic voltage and frequency scaling (DVFS) to minimize energy consumption while maintaining critical real-time properties, such as meeting application deadlines.
Tis dissertation presents a novel solution to this challenge by proposing a learning-based, scalable, composable, and adaptive scenario-aware hybrid application mapping (HAM) methodology for heterogeneous tile-based MPSoCs. Unlike previous methods, our methodology does not presuppose functional knowledge about the application or its input data and is capable of handling unknown run-time workload profiles.
Te methodology tackles run-time uncertainty by learning patterns in the applications’ execution behavior at design time and then developing scalable run-time management strategies to adapt the mappings and DVFS settings to the current workload profiles. Adhering to the concept of composability, the proposed methodology allocates separate processing resources for each application, supporting high scalability and independent optimization. To combat the abundance of possible workload profiles elicited by the interplay of the concurrently running applications, the approach is moreover scenario-based. As existing approaches inadequately capture the wide range of workload profiles induced by different input data, this work utilizes the concept of data scenarios. These data scenarios explicitly encapsulate common workload patterns triggered by diverse input data and enable the efficient optimization of tailored mappings and DVFS settings.
To determine data scenarios and simultaneously optimize scenario-specific mappings, and DVFS settings, the proposed hybrid optimization scheme integrates a scenario-aware multi-objective design-time optimization phase. Tis approach resolves the interdependence between scenario, mapping, and DVFS exploration through its iterative multi-phase design. By optimizing synergistic mapping and DVFS settings at design time, the methodology facilitates scalable scenario-aware run-time management, achieving low energy consumption and low deadline miss rates despite an uncertain execution environment.
Te design-time phase establishes a foundation for our proposed scenario-aware run-time manager that dynamically adapts mappings and DVFS settings based on current workload profiles and data scenarios. To detect and select the best-suited data scenarios at run time, this thesis introduces learning-based scenario identification and scenario selection components. Based on the selected data scenarios, scenario-aware, learning-based operating point selection components determine high-quality operating points tailored to the execution environment. Te dissertation proposes selection methodologies with varying degrees of run-time overhead and adaptivity, providing a range of different run-time trade-offs to efficiently handle diverse application and architecture types.
Te scenario and operating point selection components finely adapt their strategy to the run-time environment by learning generalizable features at design time. However, this can lead to subpar execution characteristics when the learned features diverge between the design-time training process and the run-time deployment of the manager. To address this issue, this thesis proposes the first domain-adaptive Hybrid Application Mapping (HAM) methodology that is resilient to design-time and run-time divergences, evoked by shifts between the design-time and run-time environments.
Another key contribution of this thesis is the development of an architectural transfer methodology to tackle architectural degradation and enable efficient architectural exploration. Tis transfer methodology determines mappings for novel target architecture candidates in seconds when optimized mappings for another MPSoC architecture are disposable.
In summary, this thesis contributes to the management of multi-application workloads by proposing a scenario-aware run-time methodology for adaptive resource redistribution between applications based on their workloads. Te proposed approach solves the fundamental problem of composable mapping methodologies, which often result in under provisioning or overprovisioning processing resources due to dynamic workload fluctuations. Te proposed multi-application tile mediation approach provides a holistic data-scenario-aware treatment of both intra-application and inter-application management.
With its thorough experimental evaluation, this dissertation demonstrates significant improvements in energy efficiency and deadline adherence compared to existing approaches, demonstrating the efficacy of the proposed HAM scheme in managing dynamic workload variations in modern embedded systems.