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This thesis explores the design of a flexible dataflow architecture to accelerate dynamic Graph Neural Networks (GNNs) for real-time applications requiring strict low-latency processing. Focusing on GNN models based on Edge Convolution (EdgeConv), architectural enhancements are proposed to enable runtime graph construction, dynamic edge embedding inference, and a graph-level pipelined workflow on Field-Programmable Gate Arrays (FPGAs). The design is implemented using Vitis HLS 2024.2 and targets a Xilinx Alveo U50 FPGA platform. Experimental results demonstrate that the proposed architecture achieves an end-to-end inference latency of 62.68 µs, substantially improving over CPU, GPU, and baseline FPGA implementations, and supporting the demands of real-time data processing systems.
Details
Nuclear physics;
Nuclear research;
High energy physics;
Deep learning;
Graph representations;
Real time;
Decision making;
Neural networks;
Design;
Batch processing;
Workloads;
Field programmable gate arrays;
Data acquisition systems;
Artificial intelligence;
Electrical engineering;
Information science;
Particle physics;
Thermodynamics