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Abstract
Modern workloads increasingly rely on probabilistic inference, combinatorial optimization, and generative modeling. These are problems whose inner loops are fundamentally stochastic. Yet today they are typically executed on deterministic, clocked hardware by explicitly emulating randomness and relaxation dynamics, often at substantial energy and control overhead. This dissertation advances probabilistic computing by delivering a full-stack realization of programmable probabilistic computers, co-designed across devices, circuits, architectures, and algorithms to implement stochastic dynamics directly and at scale.
Building on the established concept of probabilistic bits (p-bits), the dissertation develops scalable CMOS+X architectures that couple CMOS programmability with the native stochasticity of emerging devices to enable resource-efficient, asynchronous operation. On this substrate, it demonstrates computation beyond undirected Ising-style inference, including directed and feedforward stochastic networks enabled by controlled update scheduling, and multi-state probabilistic units that generalize p-bits beyond binary representations for richer optimization and learning.
Finally, the dissertation connects probabilistic hardware to modern generative modeling by reformulating diffusion as an iterative sequence of local stochastic updates using p-bits, and by introducing generalized diffusion mechanisms that incorporate structural correlations. Empirical results demonstrate the applicability of these methods on equilibrium spin-glass samples. Collectively, these contributions establish a practical path from probabilistic primitives to scalable, programmable systems that support inference, optimization, and state-of-the-art generative modeling.