Test Structures and Economical Non-Destructive Measurement Techniques for Multilayer Printed Circuit Board Impedance Characterization

Abstract

Engineers simulate printed circuit board (PCB) designs before manufacturing to ensure performance and to prevent system failures. Nonetheless, variations in the PCB manufacturing process often cause performance discrepancies between the designed circuit board and the fabricated circuit board. By having more information about the as-fabricated circuit board properties, designers can improve the correlation between simulation and measurement and avoid unexpected failures. Printed circuit board manufacturers can monitor the stability of the fabrication process by tracking the as-fabricated printed circuit board properties.

To improve the correlation between simulation and measurement of multilayer printed circuit boards (PCBs), this thesis introduces test structures and non-destructive measurement methodologies to extract PCB material properties and the cross-sectional geometry.

The test structures and non-destructive measurement techniques presented in this dissertation help engineers predict the as-fabricated impedance within 3% of the measured impedance. Three target as-fabricated parameters were extracted: the as-fabricated trace width, the as-fabricated substrate height, and the as-fabricated bulk dielectric constant.

The relationships between the as-fabricated parameters and relevant electrical measurements were identified. Test structures and measurement techniques were developed to extract the as-fabricated parameters. The extraction results were compared to reference measurements to check for consistency. The extracted as-fabricated properties provide better inputs for transmission line modeling, and better metrics for monitoring printed circuit board manufacturing process.