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Academic Editor:Yong Tao
School of Automation Science and Electrical Engineering, Beihang University, Beijing 100191, China
Received 21 February 2014; Accepted 22 April 2014; 18 May 2014
This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.
1. Introduction
A distributed system is the kind of system that has spatial distribution of processors and performs a certain function by exchanging information through the network system. With the development of network technology, distributed network has been widely used. The clock synchronization is one of the core technologies of distributed systems, and the aim is to maintain the clock accuracy of each node in the system. Because there is no global system beat, the system has difficulty in obtaining precise clock synchronization.
Clock synchronization algorithm enables the processor to synchronize with an external reference clock or makes each processor element synchronize with each other. The former is external synchronization, and the goal is to make all the clocks closed to the reference clock. The latter is internal clock synchronization, and the goal is to minimize the difference between any two clocks in the system. Ramanathan et al. classified in [1] the known synchronization algorithms into two different categories: hardware and software synchronization. The hardware-based clock synchronization can achieve higher precision. Currently, the main methods of hardware clock synchronization are multistage synchronizer and phase-locked loop clock. The time overheads of the multistage and phase-locked clock designs are negligible, and the accuracy is high. Consequently it is desirable to use hardware clock synchronization algorithms for time-critical applications that need tight clock synchronization. However, the hardware clock synchronization algorithm is inadequate sometimes. For example, in large systems, the multistage arrangement requires too much hardware to be practical. For this problem, some papers [2] have proposed improved schemes; however, the existing hardware solutions are complex and usually require a special mechanism to solve the problem of multiple cliques [3, 4] that prevents nonfaulty clocks from global synchronization. In contrast, software synchronization algorithms use standard communication network, making the system obtain synchronization by sending synchronization information. They do not require additional hardware. Because of the low cost...