Design, Modeling and Simulation of a New Floating Gate Transistor with a Novel Security Feature

Abstract

This study proposes a new generation of Floating Gate transistors to impede attempts to gain physical access to the stored data on them. First off, some common reverse engineering methods were discussed to find the objective of the research. So, finding the capacitance was considered to be the main focus. Then, the backbone of a simple Metal Oxide Semiconductor was explained and a simple capacitance model extracted that was compared to a simulation. This process was then extended to a Floating Gate structure. In the following chapter, a new structure was proposed. This design was then analyzed, and its capacitance was modeled partially. It was also compared to the simulation result in a limited range. In addition, a simulation was done to validate the predicted behavior of the device in different conditions. Furthermore, an extra simulation was done to test the practicality of the design. Later, different aspects of this architecture, such as effectiveness, feasibility and fabrication cost, were discussed. Finally, some possible future works were suggested that might be beneficial in improving this subject.