Timing Modeling Technology of DICE SRAM Based on SiliconSmart

Abstract

The rapid development of aerospace industry and semiconductor technology has put forward higher requirements for the radiation hardening of microelectronic devices. At the same time, with more and more applications of SRAM in SOC circuits, the anti-single event reversal effect ability of SRAM is more and more important. In this paper, the DICE structure is used to design SRAM to resist single event reversal effect. The simulation and test results show that the SRAM can resist single event reversal. In order to make SRAM with DICE structure be used in the digital design flow of SOC, this paper uses SiliconSmart to create timing model and successfully applies it to the design flow in the SOC project.