Reliability Enhancement of Power IGBTs under Short-Circuit Fault Condition Using Short-Circuit Current Limiting-Based Technique

Abstract

Like the widely-used semiconductor switch, Insulated Gate Bipolar Transistors (IGBTs) are subject to many failures and degradation in power electronic converters. In Short Circuit Fault (SCF), as the most reported failures in IGBTs, drastic, sudden temperature rise, and peak SCF current are widespread failures owing to a relatively long delay of the protection subsystem. This paper proposes a protection strategy to limit the junction temperature rise by limiting the SCF current by adding a small value resistor in the IGBT emitter. Second, it reduces the SCF current to a value much less than the saturated current. With the proposed control approach, sudden temperature rise during SCF is controlled, preventing significant failure in IGBTs. The extension of the permissible SCF time is achieved even for the cases with temporary arcs. A simple control loop activates in the SCF condition and does not create slow transients for the IGBT. The results of this paper are validated through simulation and experiment.

1. Introduction

Insulated Gate Bipolar Transistors (IGBTs) are one of the most important components in medium and high power converters. They are commonly used in traction systems [1,2], pulsed power supplies [3,4,5], HVDC circuit breakers [6,7,8], and solid-state transformers [9,10]. IGBTs and capacitors are the components with 34% failure rates in the power converters [11,12,13]. Short Circuit Faults (SCFs) are specially important as a frequent failure modes in the IGBT operation. There are several further factors that may break the device in particular cases; however, IGBT can withstand the SCF condition for a limited time, e.g., IGBTs can survive 10 $\mathsf{\mu }\mathrm{s}$ of SCF condition until it reaches thermal runaway [14,15]. Among serious failure modes during SCF condition, we can name latch-up [16], gate oscillation [17,18], self-turn off [19], thermal run away during the turn-off state [20,21], Negative Differential Resistance (NDR) [22,23], and Metal–Oxide–Semiconductor Field-Effect Transistor (MOSFET) mode [24]. Toward enhancing the reliability of IGBT devices, there have been several attempts in the literature.

The latch-up process occurs when the parasitic thyristor of the device is activated, and SCF current limiting of the IGBT malfunctions immediately. For latch-up, modifications in the structure of IGBTs are proposed in [25], which has been applied in newer generations of IGBTs. For the modern IGBTs, therefore, the advanced designs provide a homogeneously SCF current sharing between the device cells, and hence, less sensitivity to latch-up failure has been obtained. In the gate-oscillation, leading to gate-oxide breakdown, both gate circuit elements and structural factors play important roles, and specific design and implementation for gate-oscillations mitigation are required [26]. Structural modifications are also proposed for preventing self-turn-off and MOSFET modes [27]. In the NDR condition, the SCF current flows unevenly through the IGBT in the turning-off process, which results in the current filament. Therefore, structural parameters of IGBTs, such as temperature dependency of device bipolar current gain (${\beta }_{PNP}$) and the turning-off speed of the device, are the main origins of this mode [28]. The thermal runaway in the turn-off state is a major challenge for the low-power IGBTs. In this failure mode, the device can withstand the SCF until 50∼100 $\mathsf{\mu }\mathrm{s}$ after the SCF removal owing to the high leakage current. Considering the above discussion, limiting the SCF energy can be an effective approach for protecting the switch during this failure modes [20,29].

Besides the aforementioned, there are several efforts for protecting the IGBTs during SCF by shortening the SCF time interval with the general aim to minimize the SCF time and avoid the thermal runaway. In [30,31], de-saturation is proposed as an effective protection approach. In this technique, the collector-emitter voltage of the IGBT is monitored after the turn-on command to be negligible or not. In the SCF condition, this value is high and perceived as an indicator of device operation in its active region, and the IGBT must be turned off to terminate the SCF. The main drawback though is the mandatory blanking time (1∼5 $\mathsf{\mu }\mathrm{s}$) between sensing the fault and resolving it [32] due to some intrinsic differences, such as the gate threshold voltage ($V_{th}$), input capacitance ($C_{iss}$), and transconductance ($g_{fs}$), resulting in different transient time intervals [31]. The second protection approach is based on the device current rate of change (di/dt) by sensing the Kelvin inductor voltage [33,34]. This approach has fast response in fault detection condition and is just suitable for the packages with visible Kelvin inductances. The third approach directly senses the collector current using shunts or current sensors [14,35]. In this approach, the observed current is filtered to avoid detection circuit malfunctioning subject to the noise and existing leakage inductance of the path, where the delay is unavoidable.

Overall, the existing protection strategies do not consider IGBTs failure modes during SCF condition and introduce delay. By limiting the SCF current, temporary SCF conditions like vacuum arcs can be omitted [6,7] in less than several $\mathsf{\mu }\mathrm{s}$ if the SCF current is accurately limited. The IGBT, however, must be turned off, and after fault removal and protection resetting, IGBT is turned on again for normal operation after a comparatively long period.

Using the SCF current limitation, this paper proposes a novel strategy for avoiding the failure modes under SCF conditions. When the SCF conditions occur, the IGBT peak current is restricted by a small value resistance. The SCF current amplitude is then controlled to a value much less than the maximum value reported in the IGBT datasheet. If the SCF is maintained for a longer period than is allowed, the IGBT is smoothly turned off. Our approach has the following advantages:

• The junction temperature rise is much less than the case without current limiting.

• The converter operation is not interrupted due to the temporary faults.

• The IGBT failure modes in SCF relevant to the peak current can be more easily handled.

The first advantage is useful for the IGBTs with a small die where their junction temperature may considerably increase in SCF condition, and the failure in the turn-off state can be avoided by the proposed approach. The second advantage is applicable for mission-critical applications where the converter must be available seamlessly without any downtime for handling temporary faults. The third advantage can be used for all classes of IGBTs with different die structures and power ratings. The failure modes related to the IGBT SCF current, such as gate-oscillation, NDR, MOSFET mode, and self-turn off, can be easily managed. Our focus here is the temperature rise during the SCF, and the improvement in other failure modes is not the interest of this paper.

The rest of the paper is organized as follows: the proposed method is introduced in Section 2 where the operating principle, stability analysis, and improvements are described. The PSPICE simulations, finite element analysis are provided in Section 3, and finally, Section 4 provides the experimental results to validate the performance of the proposed method.

2. Proposed Method

We describe our proposed method in two phases: (1) the SCF peak current value of the IGBT is limited by a small value resistor in the device emitter connection, and (2) the limited SCF current is controlled by changing the gate-emitter voltage. When the method is applied, the short circuit (SC) energy is restricted, the SCF time interval is extended and a lower range drastic junction temperature rise is achieved. The following sub-sections describe the different phases:

2.1. Limiting SCF Current

In this phase, we determine the maximum level of the SCF current by a small value resistance in the device emitter. The IGBT short-circuit current ($I_{SC}$) is described as (1) [36].

(1)$I_{SC}=(1+{\beta }_{PNP})\frac{{\mu }_{ns}{C}_{ox}Z}{2L_{CH}}{(V_{GE}-V_{th})}^2$

where ${\mu }_{ns}$ is the average electron mobility in the channel, $C_{ox}$ is oxide capacitance per unit area, Z is the channel width, $L_{CH}$ is the channel length, and $V_{GE}$ is the gate-emitter voltage level. $I_{SC}$ in (1) can be linearized as (2) using the method suggested in [15].

(2)$I_{SC}=g_{fs}(V_{GE}-V_{th})$

(3)$g_{fs}=\frac{\partial I_{SC}}{\partial V_{GE}}=\frac{1}{1-{\alpha }_{PNP}}\frac{{\mu }_{ns}{C}_{ox}Z}{2L_{CH}}(V_{GE}-V_{th})$

Insertion of a small value resistance at the IGBT emitter limits the short-circuit current ($I_{SC}$) to limited short-circuit current named $I_{SC-L}$. According to (2) and Figure 1, the short-circuit current of IGBT ($I_{SC-L}$) is described as (4) and (5).

(4)$I_{SC-L}=g_{fs}(V_{DD}-V_{th}-R_S{I}_{SC-L})$

(5)$I_{SC-L}=g_{fs}\frac{V_{DD}-V_{th}}{1+g_{fs}{R}_S}$

where $V_{DD}$ is the output voltage of the IGBT driver in the turn-on state, and $R_S$ is the resistance value of the resistor in the emitter of the device. Considering Equation (5), $R_S$ decreases the gate-emitter voltage of the IGBT in the SCF condition; hence, it can considerably decrease the IGBT saturated current. Note that the inclusion of $R_S$ in the proposed method is different from the well-known approach in which the fault current limiting resistor is directly placed in the power path. The value of $R_S$ in the proposed method is insignificant to effect the SCF current limiting without the IGBT. In fact, $R_S$ value is chosen such that it has negligible effect in the IGBT normal operation. However, the power loss of $R_S$ is not desired in high-power applications.

To clarify the effect of $R_S$ on the short circuit current limiting and the rising power loss, a case study is introduced (see Table 1). Figure 2 depicts the ratio of the limited SC current ($I_{SC-L}$) and SC current without applying $R_S$ ($I_{SC}$), as well as the ratio of power loss of $R_S$ ($P_{loss}$) and converter power ($P_{out}$) as functions of $R_s$. It is noteworthy to mention that $P_{out}$ is the converter output power value without $R_S$. As expected, by increasing the value of $R_S$ the efficiency is slightly affected (see Figure 2a). Regarding Figure 2b, for $R_S$ values more than 0.05 $\mathsf{\Omega }$, the value of $I_{SC-L}$ is considerably lower than $I_{SC}$. As mentioned, to limit SCF current using $R_S$ is desirable for applications with low average power ratings, e.g., pulsed power supplies. However, in high or average power applications, the power loss is not insignificant; we need to apply the control method suggested in the second phase of our method, and described in Section 2.2.

2.2. Controlling SCF Current

As pointed out, limiting the SCF current directly by $R_S$ is not practical for high and average power applications. Therefore, we propose a control method for SCF current which works based on controlling the gate-emitter voltage of the IGBT under SCFs (see Equation (2)). The method is described in Figure 3 where the control unit tunes the supply voltage level of the driver ($V_{DD}$) to set the SCF current to a predetermined value.

The important signals of the proposed method in normal and SCF condition are provided in Figure 4. Accordingly, in the normal operation, the current reference (Cu. Ref. signal in Figure 3) is higher than IGBT current ($V_{samp}$ signal in Figure 3). Therefore, the operational amplifier (OpAmp) sets the PNP transistor ($S_1$ in Figure 3) to the turn-on state, and as a result, $V_{DD}$ reaches the maximum level, and the driver provides a +15 V voltage level for the IGBT gate-emitter. In the SCF condition, IGBT current exceeds the current reference. Meanwhile, the controller sets $S_1$ in the active region. Afterwards, voltage of $S_1$ increases, as depicted in Figure 4. Therefore, an appropriate value of the gate-emitter voltage is applied to the IGBT to control the SCF current. According to Figure 4, the proposed method is de-active in the normal condition. Thus, it does not negatively affect the IGBT transient times in turning-on/off processes which are seriously influenced by prior active gate control strategies [37,38].

However, the SCF current limiting unit reacts with some delays due to the limited bandwidth of the Op-Amp and $S_1$. Therefore, in the delay interval, SCF current jumps to the limiting level determined by $R_S$, and the control unit can now limit the SCF current (see the SCF current profile in Figure 5). In a hard SCF condition, where the IGBT enters to faulty condition abruptly from the normal condition, there is another current jump due to the resonance of the circuit inductance and the device capacitance elements. As described in [7], this current jump has a negligible energy and duration and can be ignored.

2.3. Stability Analysis

Our proposed method for controlling the SCF current is a closed-loop control and we need to ensure its stable steady-state operation (see the block diagram in Figure 6). Considering the IGBT model in Figure 7, the relation between the IGBT current ($I_{SC}$) and the Gate-Emitter voltage ($V_{GE}$) can be written as (6) [37]:

(6)$\frac{I_{SC}\left(s\right)}{V_{GE}\left(s\right)}=\frac{a_3{s}^3+a_2{s}^2+a_1{s}^1+a_0}{b_4{s}^4+b_3{s}^3+b_2{s}^2+b_1{s}^1+b_0}$

(7)$\begin{array}{c}\hfill \begin{array}{cc}\hfill a_0& =g_{fs}{R}_O,\hfill \\ \hfill a_1& =-C_{CG}{R}_O,\hfill \\ \hfill a_2& =-L_E(C_{CE}+C_{GE}+g_{fs}{C}_{GC}{R}_O),\hfill \\ \hfill a_3& =-L_E{R}_O(C_{GC}{C}_{GE}+C_{GE}{C}_{CE}+C_{CG}{C}_{CE}),\hfill \\ \hfill b_0& =R_O,\hfill \\ \hfill b_1& =L_C+R_G{R}_O(C_{GE}+C_{GC})+L_E(1+g_{fs}{R}_O),\hfill \\ \hfill b_2& =R_{gint}(C_{GE}+C_{GC}(1+g_{fs}{R}_O))(L_C+L_E)+R_O\left(C_{GE}(L_E+L_g)\right)\hfill \\ \hfill & +C_{GC}(L_C+L_g)+C_{CE}(L_C+L_E),\hfill \\ \hfill b_3& =R_O{R}_{gint}(C_{GC}{C}_{GE}+C_{GE}{C}_{CE}+C_{GC}{C}_{CE})(L_C+L_E)\hfill \\ \hfill & +(L_E{L}_C+L_g{L}_E+L_g{L}_C)(C_{GE}+C_{GC}(1+g_{fs}{R}_O)),\hfill \\ \hfill b_4& =R_O(L_E{L}_C+L_g{L}_E+L_g{L}_C)(C_{GC}{C}_{GE}+C_G{C}_{CE}+C_{GC}{C}_{CE}),\hfill \end{array}\end{array}$

where s is the complex frequency, and all the coefficients of (6) are defined in [37]. In addition, for the low-voltage and low-power PNP device ($S_1$), the relation between the device collector-emitter ($V_{CE}$) and base-emitter ($V_{BE}$) can be written as (8).

(8)$\frac{V_{GE}\left(s\right)}{V_{BE}\left(s\right)}=\frac{c_3{s}^3+c_2{s}^2+c_1{s}^1+c_0}{d_3{s}^3+d_2{s}^2+d_1{s}^1+d_0}$

where the coefficients of (8) could be found in [38]. However, the $S_1$ transfer function has a wide-band frequency response since it is a low-power device. The controller transfer function is assumed to be a PI controller as defined in (9).

(9)$G_C\left(s\right)=K_p+\frac{K_1}{s}$

Using MATLAB tools, the PI controller can be designed with the desired bandwidth and phase margin. The required parameters for determination of the coefficients in (6) are summarized in Table 2. For a 1 MHz bandwidth and a 60° phase margin, which equals to 300 ns settling time, the controller gain are designed as $K_p=18$ and $K_I$ = $4.1\times {10}^6$. The closed-loop bode diagram of the SCF current controlling loop is shown in Figure 8, which approves that the controller is in the stable margin. The PI controller can be tuned by changing the values of $R_1$, $R_2$, $R_f$, and $C_f$ in Figure 3.

2.4. Short Circuit Energy

The main goal of the proposed method is to reduce short circuit energy during the SCF condition. Regarding the description of the proposed method, two intervals are specified during SCF condition:

• the first interval is called delay interval ($t_D$), during which the SCF current is limited to $I_{SC-L}$,

• the second interval is the time duration in which the SCF current is controlled to the value of SCF current controller ($I_{SC-ref}$).

As a result, the short circuit energy of the IGBT ($E_{SC}$) is described as:

(10)$E_{SC}=V_{bus}(I_{SC-L}{t}_D+I_{SC-ref}(t_{SC}-t_D))$

where $t_{SC}$ is the SCF time interval, and $V_{bus}$ is the DC bus voltage applied to the device in SCF condition. $t_D$ strictly depends on the parasitic elements of the IGBT and the controller loop bandwidth, and is subject to small changes. However, $I_{SC-L}$, and $I_{SC-ref}$ can be determined in the design phase. The parameters $R_S$, and Cu. Ref. are determined for particular limited and controlled SCF currents respectively. For the cases in which the risk of the temporary SCFs is high, the limited and controlled SCF currents are chosen to values near the load nominal current to extend the permissible SCF condition. In contrast, for the cases with high level of average power, the limited SCF current cannot be very low near the load nominal current due to the power (see Figure 2). Therefore, using the proposed method, SCF energy is decreased, which leads to a lower temperature rise and lower risk of failure due to the peak SCF current.

3. Simulation Results

3.1. PSPICE Simulation

To verify the performance of the proposed method in simulation, a study in PSPICE is provided in this section (See the specifications in Table 3). According to (5) and Table 3, the value of the limited SCF current ($I_{SC-L}$) equals to 95 A, and the reference of the SCF current is set to 45 A, which is almost twice the load nominal current. Hence, during the SCF condition and after the delay interval, it is expected that the proposed method limits the SCF current to near 45 A. Figure 9 presents the IGBT waveforms in a temporary SCF. As seen, in the normal condition (during the pre-SCF and post-SCF time intervals) the IGBT current equals 22 A. As seen in the Figure 9a, in the temporary SCF condition (during the delay interval of the control loop) the SCF current is limited to near 90 A. After this time interval, the IGBT gate-emitter voltage is reduced to an appropriate value for controlling the SCF current to 45 A level (see Figure 9b). For the sustained SCF condition, the performance of the method is also examined where the temperature rise may violate the permissible value. In this case, the IGBT should be turned off after a predetermined time. Figure 10 shows the IGBTs waveform in a sustained SCF condition. As noticed, after 8 $\mathsf{\mu }\mathrm{s}$, the IGBT is turned off to avoid thermal run-away. The main advantage here is that the IGBT reaches a 45 A SCF current, which is considerably less than the maximum SCF current in the device datasheet (160 A [39]). Therefore, the failure modes related to the turn-off process and high SC current value will be prevented.

3.2. FEM Simulation

In this section, Finite Element Method (FEM) is employed to investigate the behavioral differences of junction temperature profile during the SCFs. The 3D simulation model (see Figure 11) is developed in COMSOL Multiphysics based on the case study switch [39]. To improve simulation speed, the three metal external terminal pins of the switch are not simulated. Considering this simplification, the mesh size of the FEM model (see Figure 12) is more efficiently built. With the curvature factor of 0.5, values of 0.65 mm and 0.08 mm are considered as the maximum and minimum element size of the assigned mesh. The materials’ specifications of the simulated structure are shown in Table 4. The main employed boundary conditions are:

• Boundary Heat Source: The chip area of the switch is considered as a heat source in short circuit condition (see Figure 13a). The value of the heat source is based on short circuit instantaneous power value ($P_{ins}$).

• Heat flux: The simulated heat-sink on the bottom area of the switch is considered as the area from which the produced heat can be dissipated to the environment (see Figure 13b). Considering the employed heatsink in experimental implementation, the convective heat flux with heat transfer coefficient of 10,000 W/(m${}^2·\mathrm{K}$) is considered for the heatsink.

• Initial Values: The initial temperature value of the IGBT is considered 75 ${}^{\circ }$C. This is the normal operation temperature of the IGBT in the pre-fault condition.

Using the above-explained developed simulation tool, the junction temperature of the switch is obtained in two conditions:

Condition 1: In this mode, no specific attempt is made for controlling the short circuit fault, and a 7 $\mathsf{\mu }\mathrm{s}$ SC fault with $P_{ins}=96\mathrm{kW}$ (regarding the device data-sheet [39]) is applied to the chip area.

Condition 2: In this mode, the proposed method is employed for controlling $I_{SC}$. From $t=0\mathrm{s}$ to $t=200\mathrm{ns}$, $P_{ins}=27\mathrm{kW}$ is applied to the IGBT chip area, and from $t=200\mathrm{ns}$ to $t=7\mathsf{\mu }\mathrm{s}$, $P_{ins}=57\mathrm{kW}$ is applied.

In Figure 14, the IGBT short circuit power waveforms for the two conditions are shown based on short circuit time. The simulation values in condition 1 and condition 2 are based on Table 5. In Figure 15, the FEM results for these two conditions are shown. It can be seen that the average junction temperature of the switch in condition 1 reaches to 198 ${}^{\circ }$C, while in condition 2, the average junction temperature value is obtained 116 ${}^{\circ }$C. According to the case study switch datasheet [39], the maximum junction temperature of the switch is 175 ${}^{\circ }$C, meaning that the switch will be damaged during operation in condition 1. However, using the proposed method, the switch temperature is limited to 116 ${}^{\circ }$C, considerably smaller than the maximum allowable junction temperature. It is noteworthy that the junction temperature change after the SCF is lowered to one-third by our method. Therefore, in applications with considerable delayed protection for availability purposes, the proposed method is promising.

4. Experimental Results

An experimental prototype is implemented to examine the proposed method. The considered case for the experimental evaluation has the same specifications as the simulation analysis (see Table 3). In the tests, the IGBT is turned on in the SC condition. The block diagram of the experimental setup is provided in Figure 16a. The overview of the experimental setup is presented in Figure 16b. The SCF current is monitored by measuring the voltage drop across $R_S$. At the first step, the SCF current is observed without the proposed method. To this end, the driver voltage is fixed to 15 V, and the SCF current is observed using a current transformer. In this condition, the SCF current is presented in Figure 17a. As seen, the SCF current amplitude equals 130 A without no attempt for limiting the current. In the second step, the limiting resistor as well as the control unit are added to the structure. The SCF current, when the SCF reference equals 50 A, is presented in Figure 17b, in which it can be observed that after the delay interval, the SCF current is properly controlled to a value equal 50 A. To validate the SCF current controller, SCF reference is slightly increased to 65 A (see Figure 17c).

Looking at Figure 17b,c, the SCF current can be controlled to values much less than the potential SCF current (130 A), which can limit the temperature rise in SCF conditions. Accordingly, the SCF current can be effectively limited to a value equal to twice the load nominal current by the proposed method. Figure 17d presents the gate-emitter and collector-emitter voltages of the IGBT under SCF condition, when the SCF is limited and controlled by the proposed method. Since the IGBT is turned on under the SCF condition, its collector-emitter voltage does not change from the turn-off state to the saturated region. The gate-emitter voltage, however, is decreased by the control unit to decrease the SCF current. As mentioned earlier, the proposed method does not slow down the device in the normal operation. Accordingly, Figure 18 shows the waveforms of the device in the normal operation. Regarding Figure 18, in the normal operation, the transient time intervals of the device with the proposed method (Figure 18a) and without the proposed method (Figure 18b) are approximately the same. Thus, it can be concluded that the proposed method does not affect the normal operation of the device. Considering Figure 18, the only difference is related to the high-level voltage of the IGBT’s gate-emitter where using the proposed method, this value is 0.5 V less than that of the condition without the proposed method.

In the experimental prototype, the switching frequency is 10 kHz, duty cycle is 7%, $V_{Bus}$ equals 700 V, and load current has a 10 A peak value. Thus, the average power approximately equals 490 W. The value of $R_S$ is 0.05, and its dissipating power equals 0.35 W, which is far less than the converter output power.

Finally, Table 6 compares the proposed method with extant methods. As can be seen, the proposed method has some advantages such as acceptable operation delayed operation, current controlling capability, and also does not have major effect on switch normal operation.

5. Conclusions

This paper proposed a novel SCF current limiting technique to enhance the IGBT reliability and maintain its seamless operation especially in applications where the risk of temporary SCFs is high. Using the proposed method, the SCF energy and the sudden temperature rise after the SCF condition are controlled by firstly limiting the SCF current using a small-value resistance in the device emitter, and secondly, controlling the SCF current to a predetermined SCF current using a simple PI control loop. The main advantage of the proposed control method is maintaining the normal IGBT operation with acceptable transient responses in turning on and turning off pulses. Our method substantially reduces the risk of IGBT failures due to the SCF energy and SCF peak current, which is normally the case in many applications. The performance of the method is validated via simulation, and FEM studies as well as the experimental setup results.

Author Contributions

Conceptualization, S.M.; methodology, S.M. and J.N.; software, S.M. and J.N.; validation, S.M. and J.N.; formal analysis, S.M.; investigation, S.M. and J.N.; resources, S.M., J.N. and K.M.; data curation, S.M., J.N.; writing—original draft preparation, S.M., J.N. and K.M.; writing—review and editing, S.M. and J.N.; visualization, S.M. and J.N.; supervision, K.M.; project administration, S.M. All authors have read and agreed to the published version of the manuscript.

Funding

This research is funded by the school of electronics engineering and computer science (EECS) at the Queen Mary University of London, London, UK.

Institutional Review Board Statement

Not applicable.

Informed Consent Statement

Not applicable.

Data Availability Statement

The data presented in this study are available on request from the corresponding author.

Conflicts of Interest

The authors declare no conflict of interest.

Publisher’s Note: MDPI stays neutral with regard to jurisdictional claims in published maps and institutional affiliations.

Figures and Tables

Figure 1. The schematic of the proposed method for limiting IGBT peak current.

Figure 2. (a) The ratio of [Forumla omitted. See PDF.] to [Forumla omitted. See PDF.], and (b) the ratio of [Forumla omitted. See PDF.] to [Forumla omitted. See PDF.] as the functions of [Forumla omitted. See PDF.].

Figure 3. The schematic overview of the SCF current controlling method.

Figure 4. The control signals of the proposed method in normal and SCF conditions.

Figure 5. IGBT current profile using the proposed method.

Figure 6. Schematic overview of the proposed method.

Figure 7. The simplified IGBT model valid in active region.

Figure 8. The Bode diagram of the SCF current controller.

Figure 9. IGBTs waveforms for a temporary SCF, (a) IGBT current, and (b) IGBT gate-emitter voltage.

Figure 10. IGBT [Forumla omitted. See PDF.] and [Forumla omitted. See PDF.] waveforms for a sustained SCF condition.

Figure 11. 3D simulated structure of case study IGBT switch in COMSOL; (a) overall structure with packaging, and (b) internal structure of the switch with layered structure.

Figure 12. Assigned mesh for the 3D structure of the switch in FEM solutions.

Figure 13. (a) Heat source in the chip area (red color), and (b) heat flux on the bottom area of the heatsink (blue area), as the main considered boundary conditions.

Figure 14. The SCF power using the proposed method and the case without any attempt to limit SCF current.

Figure 15. Thermal distribution of case study IGBT in condition 1 at (a) t = 1 [Forumla omitted. See PDF.], (b) t = 4 [Forumla omitted. See PDF.], (c) t = 7 [Forumla omitted. See PDF.], and for condition 2 at (d) t = 1 [Forumla omitted. See PDF.], (e) t = 4 [Forumla omitted. See PDF.], (f) t = 7 [Forumla omitted. See PDF.].

Figure 16. (a) The block diagram and (b) the photo of the experimental setup.

Figure 17. The experimental waveforms of (a) SCF current without applying the proposed method, (b) SCF current using the proposed method when SCF reference equals 50 A, (c) SCF current using the proposed method when SCF reference equals 65 A, and (d) gate-emitter and collector-emitter voltages of the IGBT.

Figure 18. The transient time intervals of the device (a) with the proposed method and (b) without the proposed method.

Table 1

The specifications of the considered case for current limiting.

Parameter	Value
IGBT Part Number	IKW40N120H3
Nominal Current	30 A
$$g_{fs}$$	20 S
$$V_{th}$$	5.5 V
$$V_{DD}$$	15 V
Maximum SC Current	160 A
$$P_{out}$$	1000 W

Table 2

The required parameters for the stability analysis.

Parameter	Value
$$g_{fs}$$	20 S
$$R_S$$	0.05 $$\mathsf{\Omega }$$
$$C_{CE}$$	55 pF
$$C_{CG}$$	72 pF
$$C_{GE}$$	3.8 pF
$$R_{gint}$$	15 $$\mathsf{\Omega }$$
$$R_O$$	55 $$\mathsf{\Omega }$$
$$L_g$$	30 nH
$$L_C$$	20 nH
$$L_E$$	15 nH

Table 3

The specifications of the considered case for simulation.

IGBT part number	IKW40N120H3
Gate driver IC	LM5111
Op. Amp IC	LM7171
Nominal Current	22 A
Blocking Voltage	600 V
$$V_{D{D}_{max}}$$	15 V
$$R_S$$	0.05 $$\mathsf{\Omega }$$

Table 4

Material specifications in the developed simulation model of IGBT.

Material	Thermal Conductivity	Heat Capacity	Density
	[$$\mathbf{W}/(\mathbf{m}·\mathbf{K})$$]	[$$\mathbf{J}/(\mathbf{kg}·\mathbf{K})$$]	[$$\mathbf{kg}/{\mathbf{m}}^3$$]
Aluminium (Al)	239	910	2699
Copper (Cu)	385	380	180
Silicon (Si)	131	700	2330
Solder (SnAgCu)	60	160	7400
Ceramic (Al$${}_2$$O$${}_3$$)	27	776	3900
Epoxy Mold	0.3	900	1250

Table 5

Parameters of the studied case study SC condition for FEM simulation.

Parameter	Value
$$t_D$$	200 ns
$$V_{bus}$$	600 V
$$I_{SC}$$	160 A
$$I_{SC-L}$$	95 A
$$I_{SC-ref}$$	45 A
$$t_{SC}$$	7 $$\mathsf{\mu }$$s

Table 6

Material specifications in the developed FEM model of SiC MOSFET power module.

Feature/Item	[15]	[30,31]	[33,34]	[6]	[7]	Proposed Method
Delay	200 ns	1∼5 $$\mathsf{\mu }$$s	Less than 100 ns	200 ns	300 ns	200 ns
SC Current limiting	Yes	No	No	Yes	Yes	Yes
SC Current controlling	No	No	No	No	Yes	Yes
Effects on normal operation	No	No	No	No	Yes	No

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