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© 2024 by the authors. Licensee MDPI, Basel, Switzerland. This article is an open access article distributed under the terms and conditions of the Creative Commons Attribution (CC BY) license (https://creativecommons.org/licenses/by/4.0/). Notwithstanding the ProQuest Terms and Conditions, you may use this content in accordance with the terms of the License.

Abstract

Electrical arc fault detector development requires many tests to develop and validate detection algorithms. The use of artificial intelligence or mathematical transformation requires the use of consequential datasets of current signatures corresponding to as many different situations as possible. In addition, one of the main drawbacks is that these experiments take a great deal of time and are often laborious in the laboratory. To overcome these limitations, a virtual test bench based on the modeling of a modular 230 VAC electrical circuit has been developed. The simulated network is composed of different home appliances (resistor, vacuum cleaner, dimmer, etc.) and its configurations are those of single and combined loads. The fault modeled is an electric arc, modeled by active diode switching, which can be inserted at any point of the circuit. This arc model takes into account the random variations in the restrike and arc voltage. All the appliance models are validated by comparing the frequential (harmonic distortion) and temporal (agreement index) signatures of the measured currents in real situations to those obtained by modeling. The results obtained using the model and experiment network show that the current signatures are comparable in both cases. Further, two detection algorithms are tested on those current signatures obtained by the modeling and experimentation. The results are comparable and provide identical detection thresholds.

Details

Title
Simulation Environment for the Testing of Electrical Arc Fault Detection Algorithms
Author
Lezama, Jinmi 1   VIAFID ORCID Logo  ; Schweitzer, Patrick 2   VIAFID ORCID Logo  ; Tisserand, Etienne 2   VIAFID ORCID Logo  ; Weber, Serge 2   VIAFID ORCID Logo 

 Grupo de Circuitos y Sistemas Electrónicos de Alta Frecuencia CSE-HF-EPIET, Universidad Nacional Tecnológica de Lima Sur, Lima 15834, Peru; [email protected] 
 CNRS, Institut Jean Lamour (IJL), University of Lorraine, 54011 Nancy, France; [email protected] (E.T.); [email protected] (S.W.) 
First page
4099
Publication year
2024
Publication date
2024
Publisher
MDPI AG
e-ISSN
20799292
Source type
Scholarly Journal
Language of publication
English
ProQuest document ID
3120641927
Copyright
© 2024 by the authors. Licensee MDPI, Basel, Switzerland. This article is an open access article distributed under the terms and conditions of the Creative Commons Attribution (CC BY) license (https://creativecommons.org/licenses/by/4.0/). Notwithstanding the ProQuest Terms and Conditions, you may use this content in accordance with the terms of the License.