INTRODUCTION
Neuromorphic computing systems, exemplified by memristors, have immense potential in simplifying computational and storage structures while improving computational efficiency.1–3 Advancements in neuromorphic engineering not only offer a new technological pathway for future cognitive systems on silicon,4–9 but also align with the demands of organic electronics for low-power consumption and high integration potential.10–13
However, challenges in fabricating these versatile neuromorphic systems often arise from the distinct materials and manufacturing techniques required for various components, such as electronic synapses and neurons. These variations can introduce technical complexity, increase resource consumption, and lead to material incompatibility challenges.14,15 In addition, traditional semiconductor- and plastic-based commercialized neuromorphic devices may also contribute to the rapidly growing e-waste problem.16 From this perspective, additive manufacturing of reconfigurable memristors on sustainable substrates offers an efficient and eco-friendly approach for neuromorphic systems in transient or disposable applications. Reconfigurable memristors, with their ability to emulate both synaptic and neuronal functions, greatly simplify the circuitry architecture and enhance integration density.17,18 Although there have been some efforts in employing additive manufacturing techniques such as aerosol jet printing,19–21 screen printing,22 laser printing,23 inkjet printing,24,25 electrohydrodynamic printing26 to fabricate memristor devices or simple, traditional electronic circuits,27 exploration of multifunctional reconfigurable memristors on eco-friendly substrates has remained unexplored.
Here, we present inkjet-printed reconfigurable memristors on paper. We demonstrate a comprehensive pathway covering 2D material exfoliation, ink formulation, device functionality integration, array fabrication, and device recycling, as a potential strategy for achieving sustainable neuromorphic electronics. We study inkjet-printed MoS2 based memristors for their unique stacking configuration created by the printing process and the abundant sulfur vacancies in MoS2 generated during the high-pressure homogenization (HPH)-assisted exfoliation. Our devices exhibit both non-volatile resistive switching and volatile switching properties under different compliance current (CC). This dual functionality facilitates the integration of synaptic and neuronal functionalities within a single device. Achieving >90% production yield from a 16 × 65 array, our Ag/MoS2/Au-structured devices exhibit an ON–OFF ratio of up to 105 and an operation voltage <0.5 V. We demonstrate that the device components can be recycled and reused, with re-fabricated devices also exhibiting robust performance, with an ON–OFF ratio exceeding 105 and operational voltages <0.65 V. To illustrate the versatile applications of our memristors, we first explore the reconfigurability of individual devices and demonstrate tri-mode electronic time–temperature indicators (TTI) on a paper substrate for smart packaging application. Subsequently, we extend our focus to the system level, where we develop a lightweight artificial neural network (ANN)-based algorithm for efficient extraction of key features from color images. We then adapt this algorithm for diabetic retinopathy (DR) screening. Simulation results indicate that, accounting for device variation extracted from our 16 × 65 printed memristor array, this system identifies all four types of lesions, achieving both specificity and accuracy indices exceeding 90%. Our paper-based reconfigurable memristors show clear advantages of multi-functionality and low-cost, high-yield manufacturability at a large scale, and hold great promise toward future sustainable electronics.
NANOFLAKE INK FORMULATION AND INKJET PRINTING
Figure 1A illustrates the process, starting from ink formulation to device fabrication and recycling pathways. The HPH process exfoliates bulk MoS2 powder (Sigma-Aldrich), dispersed in isopropyl alcohol (IPA), into few-layer nanoflakes.28 This procedure leverages the combined effects of cavitation, shearing, and impact forces within the shearing chamber.29 Compared to ultrasound-assisted liquid-phase exfoliation, HPH offers improved sustainability (Figure S1). It is more time-efficient, reduces solvent waste, and achieves higher exfoliation yields. Furthermore, its straightforward process minimizes operational complexity and environmental impact, making it a resource-efficient and eco-friendly exfoliation method.28 By controlling the number of processing cycles, we can tune the lateral dimensions of the exfoliated 2D materials while maintaining a relatively consistent thickness. Atomic force microscopy-based (AFM) statistics in Figure S2 reveals that the lateral size of the exfoliated MoS2 flakes after 250 cycles is 42 ± 15 nm with a thickness of 2.6 ± 0.8 nm. The uniformly sized nanoflakes ensure a stable inkjet printing process, crucial for maintaining consistency in large-area device fabrication. This uniformity also promotes a homogeneous surface topology, pivotal in ensuring high device yield and mitigating device-to-device variation.30 UV–Vis absorption spectroscopy of MoS2-IPA dispersion with varying diluted concentrations exhibits two characteristic excitonic peaks (Figure 1B), located near 670 nm (A) and 615 nm (B). These peaks correspond to the direct bandgap excitonic transitions at the K point in the Brillouin zone of the 2H phase of MoS2, indicating that the inherent phase of the MoS2 has been preserved during the exfoliation process.31,32 As shown in Figure 1C, x-ray photoelectron spectroscopy (XPS) on MoS2 nanoflakes shows characteristic peaks at 229 eV (Mo 3d5/2), 232.2 eV (Mo 3d3/2), 163 eV (S 2p1/2), and 161.8 eV (S 2p3/2), respectively. These detected binding energies align precisely with those expected for pristine MoS2 without oxidation.32 The XPS results also reveal the stoichiometry of Mo/S with a ratio of 1:1.83, indicating the generation of sulfur vacancies during the HPH process. Vacancies at the nanoflake edges provide vertical percolation pathways with low diffusion barriers.19 Thus, these vacancies may enhance interlayer diffusion of conductive filaments (CF), promoting the resistive switching (RS) performance.30,33 Therefore, the uniform nanoflakes with sulfur vacancies exfoliated via the HPH technique serve as a robust basis for the fabrication of filamentary memristors.
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The exfoliated flakes are dispersed in a binary solvent of IPA/2-Butanol (10 vol%) to formulate the ink.34 The use of binary solvents suppresses non-uniform deposition.35 The resultant ink allows smooth printing without nozzle clogging. Figure 1D illustrates an example of the inkjet-printed pattern produced using the formulated ink on paper substrates. The insets showcase the corresponding optical micrographs of the selected areas, illustrating the uniform deposition and clear edges of the printed patterns. We define printing accuracy in terms of pattern fidelity, which quantitatively assesses the alignment accuracy between the designed and the actual printed patterns. It is assessed by overlaying the printed and imported images, and quantifying the deviation as a percentage of the total printed area (Figure S3). At the microscopic scale (scale bar 200 μm), the average printing accuracy reaches 98%. Stable jetting and high printing accuracy with our ink formulation enable uniform material deposition for device fabrication.
CHARACTERIZATION OF INKJET-PRINTED
The printed memristors, featuring an Ag/MoS2/Au stacked structure, are fabricated on PEL60 paper substrate (see Methods). The high solvent absorption capacity of the substrate facilitates rapid ink wicking and drying after deposition. This reduces the inter-diffusion of different inks, further aids suppression of non-uniform deposition and avoids the need for high-temperature annealing to remove the carrier solvents trapped in the printed layers.
To investigate the impact of active layer thickness on resistive switching (RS) characteristics in the printed devices, we fabricate an array of 5200 (80 × 65) memristors; Figure 2A. The array is divided into five sections, with increasing number (from 10 to 50 print repetitions) of MoS2 layers. Figure 2B shows the top-right corner of the array while Figure 2C displays a 3 × 4 set of devices within this region. For each section (16 × 65 devices), 100 devices are randomly selected for measurement (Figure S4). Statistical analysis reveals that incremental printing layers effectively mitigate disturbance problems. As the number of printed layers increases from 10 to 30, the production yield improves. However, further increasing the layer count beyond 30 results in an excessively thick active layer, necessitating a forming voltage for the devices or even preventing the devices from being SET, thereby reducing yield. Among the above sections, devices with 30 layers exhibit the highest yield of 93% (Figures 2E and S5) for both volatile and non-volatile states. Moreover, 92.5% of the working devices exceed an ON–OFF ratio of 5 decades (Figure 2F), with a mean ON–OFF ratio of 5.5 ± 0.3 decades (Figure S5), indicating well-managed device-to-device variation (Figure S6). The 30-layer device also strikes an optimal balance between the ON–OFF ratio and operation voltage (Figure S7). Therefore, the 30-layer device is used in all subsequent evaluations unless stated otherwise. Cross-sectional transmission electron microscopy (TEM) (Figure 2D) and the corresponding energy-dispersive x-ray spectroscopy (EDS) elemental mapping (Figure S8) reveal that the 30-layer device has an active layer thickness exceeding 500 nm with minimal oxidation. This may result in a high initial resistance, beneficial for achieving a large ON–OFF ratio. It also reveals that upon deposition via inkjet printing, the exfoliated nanoflakes create a stacked architecture. This introduces a plethora of potential diffusion pathways. These pathways are essential for the formation of CFs and lay the foundation for low voltage operation of the device.19
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Under different CC conditions, we can control the formation and rupture of CFs to manipulate the transition between volatile and non-volatile states. When the CC is 1 mA, the application of SET voltage (positive voltage) oxidizes the silver atoms into silver ions, which migrate through the MoS2 layer and connect to the grounded bottom electrode, forming robust CFs.1,36 These filaments remain stable for more than 5000 s (Figure S9), demonstrating excellent data retention capabilities. Thus, the device necessitates a RESET process to break these filaments using negative voltage (Figure 2G), which might be a consequence of the synergistic effects of both the dissolution of Ag through reverse ionic diffusion and thermally induced filament disruption. Under this CC, the ON–OFF ratio of the memristor reaches 105 with a sharp turn-on slope of 3.07 mV decade−1, accompanied by mean SET voltage of 0.29 ± 0.10 V and RESET voltage of −0.44 ± 0.20 V (Figure S10). Notably, the critical resistive switching (RS) performance parameters outlined above, such as operational voltage below 0.5 V and ON–OFF ratio exceeding 10,5 compare favorably with those of other high-performance memristors fabricated by chemical vapor deposition (CVD) or complementary metal-oxide semiconductor (CMOS) techniques (Table S1). When the CC is between 0.01 mA and 1 mA (e.g., 0.1 mA), the device exhibits unstable (self-recovering) non-volatile RS.37 The retention of the device is less than 2000s (Figure S9). As the CC is decreased to 0.01 mA, the devices enter the volatile state (Figure 2H). In this regime, thinner CFs formed during the SET process tend to spontaneously dissociate upon removal of the electric field due to thermally assisted diffusion and minimum energy effect.38–40 This exemplifies typical volatile switching behavior. With an ON–OFF ratio of 10,5 the average SET voltage of the memristor is 0.40 ± 0.19 V (Figure S11), while the power consumption is merely 50 pW. The high ON–OFF ratio and low power consumption of volatile switching make it ideal for use as selectors to strongly reduce sneak currents within crossbar arrays of memory devices.40
To investigate the differences in performance between the devices in crossbar array and their standalone counterparts, we fabricate 100 standalone memristors. The yield is 93%, with a mean SET voltage of 0.31 ± 0.10 V, a mean RESET voltage of −0.41 ± 0.11 V and a mean ON–OFF ratio of 6.40 ± 0.22 decades (Figure S12). Compared to devices within the crossbar array, the standalone memristors exhibit a higher ON–OFF ratio. This enhancement could be due to the avoidance of OFF-state leakage current accumulation and ON-state current splitting in the array configuration. Furthermore, to validate the reproducibility and robustness of our fabrication process, we fully reproduce our entire workflow—from HPH exfoliation to ink formulation and device fabrication—to create a new batch of 30-layer 16 × 65 array. This subsequent run achieves a 91% yield, with a mean SET voltage of 0.50 ± 0.18 V, a mean RESET voltage of 0.51 ± 0.23 V and an ON–OFF ratio of 5.37 ± 1.15 decades (Figure S13). We observe a slight variation in the operation voltage. Such batch-to-batch variance can be attributed to slight differences in exfoliation and subsequent ink formulation, affecting the overall composition (e.g., nanoflake size distribution and defect densities of the nanoflakes). Notably, the preserved high yield and consistent device performance parameters confirm the robustness of our overall methodology. Moving forward, further refining the HPH exfoliation process and implementing targeted defect engineering strategies can help improve batch-to-batch consistency.
Sustainable electronics are highly desirable in reducing the ever-increasing environmental footprint of electronic waste and promoting sustainable development.41 This is particularly important for disposable and recyclable electronic applications. For disposable applications, like bio-monitoring patches, minimizing waste post-use is essential. Meanwhile, recyclable applications, such as smart packaging, can significantly benefit from being designed for easy recycling and reduced material use. In light of this, we explore the disposability and recyclability of the memristors after use. Our device demonstrates robust durability, with an endurance exceeding 250 cycles (Figure S14) and stable functionality maintained for over 6 months (Figure S15), highlighting reliability and long-term performance. Upon reaching the end of its lifespan, all components of the printed memristor can be recycled and reused. In particular, we can detach the inkjet-printed MoS2 and the silver electrodes on MoS2 via simple ultrasonic cleaning (Figure S16A,B). The detached MoS2 nanoflakes and Ag nanoparticles are recollected and separated (Figure S16C) through vacuum filtration and high-speed centrifugation (see Methods). The paper substrate, following ultrasonic cleaning, can be appropriately disposed of42 or reused for the re-fabrication of the device. The re-fabrication process includes re-printing of the MoS2 layer and silver electrodes onto the same paper substrate with the gold electrode (Figure S16D). Consistent with the performance of the original device, the reprinted memristor under different CCs demonstrates a transition between non-volatile (Figure S16E) to volatile state (Figure S16G). Despite variations in the operational voltage (Figure S16F,H), the reprinted device still exhibits an ON–OFF ratio exceeding 105 and mean operational voltages below 0.65 V (Figure S16E,G), affirming its consistent reliability throughout the recycling process. These results highlight the potential of our devices in exploring the challenges of electronic waste and future opportunities in environmentally friendly electronics.
RESISTIVE SWITCHING MECHANISMS AND ANALYSIS
Subsequently, to elucidate the operating mechanisms of our devices, we deploy a range of complementary techniques, including conduction mechanism analysis, electrode substitution, in-situ microscopic examination and defect engineering. Conduction mechanism analysis indicates that the formation, rupture, and self-dissolution of CFs significantly affect the operational mechanism of the device (see Figure S17 for detailed notes). Then, we carry out electrode substitution experiments to confirm that the Ag electrodes dominate these dynamics of CFs. We use inkjet-printed graphene (Gr) electrodes to substitute either the top Ag or the bottom Au electrodes. The Gr/MoS2/Au device, without top Ag electrode, shows no resistive switching performance (Figure S18A). Conversely, the Ag/MoS2/Gr device, with the bottom electrode switched from Au to Gr, exhibits volatile RS with a reduced operation voltage of 0.30 ± 0.10 V (Figures 3A and S18B) compared to the original devices (Figure 2H). The cross-sectional STEM-EDS image of the MoS2/Gr/Paper layer boundary (Figure 3B) in the Ag/MoS2/Gr device reveals uniform material stacking and a well-defined interface, which are critical for stable device operation. The volatile RS performance can be attributed to the self-compliance at low CC, and chemically inert characteristics of graphene against Ag atoms, which hinders the stability of the formed Ag CFs, facilitating volatile switching.43,44 This implies possible future opportunities to further reduce energy consumption and fine-tune the device operational voltage by simply replacing the electrode materials.
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Next, we use conductive AFM (CAFM) in contact mode to investigate the dynamics of Ag CFs at nanoscale (Figure 3C). We replace the bottom Au electrode with the Pt–Ir CAFM probe. With the Pt–Ir probe grounded and a positive voltage sweep applied on the inkjet-printed silver, the Ag/MoS2/Pt–Ir structure behaves like a nanoscale memristor. In the first sweep, we observe a volatile RS switching with a 104 ON-OFF ratio. With repeated voltage scanning, the SET voltage and ON–OFF ratio gradually decrease, and the device eventually stabilizes in the LRS (Figure 3D). This conductance increase implies synaptic plasticity, providing in-situ evidence of our device's transition from volatile state to non-volatile state.37,45 Upon applying a higher voltage to the sample, the location where thick and persistent filaments form, can be directly observed in the current map (Figure S19A,B).
Lastly, we study the influence of sulfur vacancies on RS performance of our devices. We fabricate MoS2 memristor devices with 10 to 40 printed layers (Figure S20) to serve as a control group in comparison to the original devices. Following this, we employ dithiolated conjugated molecule 1,4-benzenedithiol (BDT) to heal the sulfur vacancies and to facilitate the covalent bridging of the neighboring MoS2 flakes (Figure 3E, see Methods).46 Due to the healing of vacancies, all the BDT-treated devices (Figure S20) show a larger breakdown voltage of MoS2 layer compared to the untreated counterparts (Figure S7). For example, the 30-layer device requires a forming voltage of 9 V (Figure 3F), while its untreated counterpart operates at <0.5 V (Figure 2G). Furthermore, we investigate the effects of varying BDT treatment durations (2, 12, and 24 h) on device performance (Figure S20E). As the treatment duration increases, the breakdown voltage becomes progressively larger. This indicates that longer treatment times block more silver ion permeation pathways. The healing of sulfur vacancies through BDT treatment inhibits the formation of conductive filaments (CFs) within the MoS2 layer, which may explain the observed performance changes. Only a high forming voltage can break down the MoS2 layer and form CFs to set the device to LRS. However, the filaments formed under such excessively high voltage often cause irreversible damage to the devices, resulting in a minimal ON–OFF ratio. Upon conducting subsequent I-V sweep operations, all of the BDT-treated devices display a noticeable decrease in the ON–OFF ratio, eventually leading to the complete disappearance of the RS phenomenon within three scans or fewer (see Figures 3F and S20 for 10–40 layers of the BDT-treated devices). Interestingly, retention measurements reveal that even when the CC is below 0.01 mA, the BDT-treated devices maintain stored information, unlike the original devices that transition into a volatile state under the same CC (Figure S20D). This retention behavior suggests that sulfur vacancies in untreated devices promote the dissociation of Ag CFs by enhancing their instability under low CCs. Thus, the healing of these vacancies may extend the retention of CFs.
Crucially, our results highlight that the sulfur vacancies introduced by the HPH process, along with the permeation pathways within the MoS2 layer, play a pivotal role in promoting RS and the reconfigurable functionality of the device.
RECONFIGURABLE MEMRISTIVE PERFORMANCE IN INKJET-PRINTED DEVICES
Due to the ability to dynamically transition between non-volatile and volatile states, our reconfigurable memristors can effectively emulate both synaptic and neuronal functionalities. This emulation is achieved by varying voltage amplitudes and duration: lower voltage pulses enable transient changes akin to neuronal firing, while higher voltages induce synaptic-like behavior characterized by gradual resistance changes after the CFs form, mimicking synaptic plasticity.
Neurons process information by integrating incoming signals (Figure 4A). When subjected to external stimuli, the neuron, initially at a resting potential, begins to integrate voltage changes from these input signals into its membrane potential.47,48 Once the membrane potential reaches a specific threshold, the neuron “fires” action potential. The membrane potential swiftly resets to the initial resting state, preparing to respond to subsequent stimuli.49 This leaky integrate-and-fire (LIF) functionality can be replicated by memristors operating in a volatile threshold switching state (Figure 4B). In response to a continuous voltage pulse train (100 μs, 1 V; 100 μs, 0.1 V), no current response is detected until a sudden surge after receiving the 5th pulse, mimicking the integrate-and-fire behavior. The small current spikes occurring at the edge of voltage pulses are possibly induced by parasitic capacitance. After firing, the current falls to the limit of detection again in the subsequent voltage pulses, indicating that the memristor has recovered to the low conductance state and is prepared for the next-cycle integration process. This self-recovery stems from the fragile nature of the Ag CFs. We suggest that the formed CFs are thin and prone to spontaneous dissociation, which emulates the repolarization behavior of neurons.44 Figure 4C illustrates the relationship between pulse duration and the pulse numbers required for “firing”. For this, we denote a firing event when the current exceeds 1 μA under continuous voltage pulses. The firing ratio is defined as the percentage of such firing events for a train of 100 pulses. We see that as the voltage pulse width widens with a fixed pulse period, the memristor more readily reaches the threshold for firing. This ability of the memristor to adjust its firing threshold this way underscores its potential for efficient and adaptive neuromorphic computing.
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While neurons follow a threshold-based firing model, synapses facilitate information transfer by fine-tuning their synaptic plasticity in a highly parallel manner. The diffusion dynamics of Ag resembles the behavior of synaptic Ca2+ in biological systems (Figure 4D).40,50 Applying large voltage pulses can induce the growth of CFs, likely because the high-rate injection of Ag+ into the filament volume predominates over filament self-dissolution.18 This process is akin to synaptic strength enhancement caused by a Ca2+ surge in biological systems. Therefore, the steady-state evolution of the filament can effectively emulate synaptic plasticity.18 When exposed to a large voltage pulse train (15 ms, 2.5 V; 5 ms, 0.1 V), a progressive increase in conductance is observed (Figure 4E). It mirrors the continuous growth in synaptic weight between neurons, a key process in biological memory formation and strengthening. The synaptic weight could also be adjusted through pulse frequency and amplitude (Figure S21). This feature resembles the neurological system's mechanism, where the strength of memory consolidation is influenced by the frequency and intensity of neural stimuli.51 At this stage, the current under the read voltage remains intact. Therefore, the device remains in a volatile state, exhibiting short-term plasticity (STP). When the voltage pulse is increased to 3.5 V, the current surges sharply, transitioning into a non-volatile state (Figure 4F). This is likely due to the sudden formation of robust CFs under substantial stimulus. Within the same pulse cycle, although the synaptic current reaches a CC of 5 mA during the pulse train, a gradual increase in conductance is observed under the read voltage. The increase in current exhibits a near-linear trend (inset of Figure 4F), which is favorable for constructing ANN.52 After the completion of the pulse train, the device continues to maintain its current under the read voltage, confirming the transition from STP to long-term plasticity (LTP), signifying the establishment of a long-term connection between the synapses. Collectively, by modulating the voltage pulse parameters, the device can therefore simulate the functionalities of both synapses and neurons.
RECONFIGURABLE MEMRISTOR-BASED SMART PACKAGING
The use of paper substrate allows our printed memristors to be used for innovative smart packaging. As a proof of concept, we physically implement a memristor-based tri-mode electronic TTI.
TTI is a crucial component in smart packaging53 for applications demanding strict temperature regulation, such as food and pharmaceutical industries (Figure 5A).54,55 It dynamically tracks ambient temperature changes, integrates these variations to compile thermal history, and identifies exposures to abnormal temperatures that could compromise product quality. Compared to traditional TTIs, such as those based on chemical or enzymatic reactions,56,57 electronic TTIs offer real-time, continuous temperature monitoring with enhanced accuracy and reliability. However, manufacturing complexity and cost limit the wide adoption of electronic TTIs.58
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The operation principle and conceptual design of the electronic TTI are illustrated in Figure 5B,C, respectively. Specifically, reconfigurable memristors simplify the neuronal circuit design (Figure S22) and concurrently function as both the processor and data storage unit (Figure 5B). Its LIF functionality tracks thermal history of the package during its journey through the supply chain while providing over-threshold warning with the reconfigurable properties of its non-volatile state. To test our TTI implementation, we use different voltage pulses to represent temperature sensor output corresponding to different temperatures. The memristor efficiently processes these signals and converts them into a time–temperature integral. Its “leaky” feature only accounts for information reaching the firing threshold, effectively filtering out insignificant temperature fluctuations. In contrast, significant temperature variations are recognized by the device transitioning into a non-volatile state, thereby maintaining the information. Figure 5D illustrates the implementation of our TTI system. Using a simple visual indicator like a micro-LED, the output from the TTI can be displayed (Figure S23; Videos S1 and S2). When the temperature remains within the ideal range, the time–temperature integral is insufficient to trigger any firing event (Figure 5E). The LED remains off, indicating the product quality is assured. Upon exposure to moderately elevated temperatures, the system commences the integration of temperature signals. As thermal conditions persist, the time–temperature integral surpasses the threshold, triggering the firing events. Consequently, the LED would flash, serving as a warning to cold chain management about transient deviations (Figure 5F). Once the temperature returns to the normal range, the display system reverts to the off state due to the memristor's “leaky” characteristic. This suggests that the memristor-based TTI system is capable of effectively conducting real-time monitoring of minor and short-lived temperature anomalies. Furthermore, significant temperature exceedance over an extended period or extreme fluctuations in a brief period would lead to the formation of robust CFs (as demonstrated in Figure 4F), pushing the time–temperature integral far beyond the threshold. Under such circumstances, robust CFs form, shifting the memristor into a non-volatile state (Figure 5G). The resulting continuous illumination of the LED signals potential spoilage of the packaged contents.
By replacing the gold (Au) bottom electrode with an inkjet-printed graphene electrode, the threshold for initiating firing events in the device can be further lowered to 0.4 V (Figure S24). This underscores not only the potential for further reduction in energy consumption but also possibilities in broadening and refining the range of operating temperatures, and extending application scopes by replacing materials in inkjet-printed memristors. Furthermore, the sensitivity of paper to moisture and humidity can compromise the reliability of TTI devices. To address this, the memristors can be coated with parylene (Figure S25), providing waterproof performance that ensures stable TTI operation across varying environmental conditions. The TTIs based on printed reconfigurable memristors thus have potential in smart packaging.
MEMRISTOR ARRAY FOR EDGE COMPUTING IN MEDICAL IMAGE ANALYSIS
The multilevel conductance states of our paper-based memristor system can provide ANNs with the capability for refined weight adjustments, potentially enhancing ANN-based image recognition performance. Moreover, its lightweight neural networks for edge computing facilitate local processing, which not only minimizes cloud data transfer, but also amplifies data security and transmission speeds. This approach offers distinctive value for medical image analysis at the point-of-care. The democratization of early detection for “stealth diseases” necessitates platforms that are user-friendly and economically efficient. Our system not only offers portability and cost-effectiveness but may also allow disposal of physical implementations after use with minimal environmental footprint.
Here we propose a memristor-based DR screening system. This system incorporates a designed algorithm for feature extraction59 and utilizes a memristor array-based 81 × 16 × 2 ANN for subsequent feature analysis. Each memristor functions as a synapse connecting neurons across consecutive layers, with its conductance states representing the synaptic weight. The neurons are defined by a mathematical model that incorporates a weighted sum followed by an activation function.
DR is a severe complication affecting approximately one-third of diabetic patients and is the primary cause of blindness within this demographic.60 The stealthy progression of DR often results in significant retinal damage before being diagnosed, owing to the lack of symptoms in its early stages.61,62 Our DR screening system conducts lesion analysis offline by edge computing to identify abnormal changes in retinal blood vessels. In contrast to existing DR testing software that requires uploading raw images to the cloud for analysis, our system only reports post-analysis grading results, without the need for data transfer (Figure 6A).
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In our approach, retinal images with retinopathy are imported from the DiaretDB1 dataset, followed by feature extraction.63 In the raw image (Figure 6B), the backgrounds containing the optic disc and vasculature are first removed to enhance the visibility of candidate lesions (Figure 6C). The algorithm then successively performs binarization and morphological operations on the images to remove noise and identify the candidate lesions. Based on distinct appearance and underlying pathogenesis, lesions are categorized into bright lesions (Figure 6D) and red lesions (Figure 6E). Red lesions primarily comprise retinal hemorrhages and microaneurysms, while bright lesions mainly encompass hard exudates and soft exudates.60 For each type, the algorithm separately extracts the structural, color, and derivative features and converts these features into 81-dimensional vectors (Figure S26). The vectors are subsequently input into a designed memristor array based 81 × 16 × 2 ANN for feature analysis. We use the synaptic plasticity of the memristors to conduct simulation. Considering the variance of our printed devices, we randomly select 9 devices in the 30-layer memristor array in Figure 2A and input their conductance potentiation and depression cycles (Figure S27). During a forward pass, the processed data is fed into the ANN, yielding a grading result. The ANN undergoes training through the back propagation algorithm, differentiating regions with lesions from those without and adjusting synaptic weights according to output errors. This training encompasses 1000 epochs. The detection result for the representative image is shown in Figure 6F, with the lesion areas marked in blue. Figure 6G summarizes the overall accuracy and specificity for all four lesion types, each exceeding 90%. These simulated results highlight the promising capabilities of our memristor system for potential applications in medical image processing.
CONCLUSION
Our paper-based, inkjet-printed, reconfigurable memristors exhibit outstanding resistive switching performance. The recyclability of the memristors emphasizes an important step toward sustainable electronics. By demonstrating our memristors in smart packaging and a designed framework for medical image processing, we underscore the potential of our paper-based devices. Our research provides valuable insights into the development of sustainable and efficient neuromorphic systems and opens up new avenues for future paper-based electronics.
EXPERIMENTAL SECTION
HPH process for ink preparation: The PSI-40 high-pressure homogenizer, together with the D202D diamond interaction chamber (dual slot deagglomeration chamber with microchannel dimension of 87 μm), is used to make printable ink of MoS2 nanoflakes. MoS2 powder (~6 μm, from Sigma-Aldrich) is first mixed with anhydrous IPA (from Sigma-Aldrich) at a concentration of 5 mg mL−1 to formulate the initial dispersion. During the high-pressure homogenization (HPH) process, a combination of cavitation, shear, and impact forces reduces the size of particles and exfoliates the MoS2 crystals into nanoflakes. This nanoflake dispersion is then collected and centrifuged for 1 h at 4000 rpm (corresponds to a relative centrifugal force of 1520 g) with a Hettich Universal 320 Benchtop Centrifuge. This centrifugation step separates the supernatant containing exfoliated MoS2 nanoflakes from the unexfoliated materials (sediments within the container after centrifugation). The supernatant is collected as initial IPA ink. This concentration of MoS2 is adjusted for inkjet printing, with 2-butanol (from Sigma-Aldrich) added into the ink in a volume ratio of 10% to reduce the coffee ring effect of the printing process by inducing Marangoni flow. The final concentration of the MoS2 ink is 4 mg mL−1. The graphene ink is also formulated using HPH technique, with the addition of 3% polyvinylpyrrolidone (PVP). The concentration of the graphene ink is 2 mg mL−1.
UV–Vis measurements: A Cary 7000 UV–VIS–NIR Spectrometer is used to measure the absorbance of the MoS2 ink at a given concentration. The Lambert–Beer law is used to calculate the concentration of the ink based on the measured absorbance, the optical path length (10 mm) of the PMMA cuvettes, and the extinction coefficient of MoS2 nanoflakes at 672 nm (3400 L g−1 m−1).64
AFM measurements: Bare silicon wafers are used as substrates for the deposition of MoS2 nanoflakes for AFM characterization. Substrates are cleaned by sonication in acetone and IPA (5 min for each step) and are rinsed with DI water multiple times before drying under nitrogen blow. Then 1 mL (3-aminopropyl)triethoxysilane (APTES) is added to 50 mL DI water to make the APTES solution. The silicon substrates are left in the APTES solution for 15 min to form a self-assembled monolayer (SAM) of APTES. The substrates are then put into clean water to stop the self-assembling process and get thoroughly rinsed. After this, the substrates are dried again with nitrogen blow. Diluted MoS2 solutions (0.005 g L−1) are drop-cast onto these APTES-modified substrates and left for 40 s to let MoS2 nanoflakes bind with the APTES monolayer. The samples are then rinsed thoroughly with DI water to remove the unbound flakes. Then samples are finally dried and measured with a Bruker Icon AFM to get statistics of the lateral size and thickness of the flakes. The CAFM measurements are conducted in a Bruker Dimension Icon Pro Instrument, using a Bruker Extended TUNA module. For the measurements, we use conductive Pt–Ir coated soft SCM-PIC-V2 tips (Bruker make, spring constant = 0.1 N/m, nominal tip radius 25 nm).
Device fabrication: PEL60 printing is used as the substrate. A 5 nm layer of chromium (as an adhesion layer) and a 20 nm layer of gold are deposited sequentially on the substrate using an Edwards E306A Thermal Evaporator to form the bottom electrode. The evaporation process is maintained at low pressure (2 × 10−6 mbar) and a low rate (0.1 A°s−1). A Fujifilm Dimatix DMP-2800 inkjet printer is used for inkjet printing. The 2D MoS2 and graphene inks are printed with a drop spacing of 25 μm. The Ag ink (from Sigma-Aldrich) is printed perpendicular to the bottom electrodes with a drop spacing of 25 μm and is then annealed at 100°C for 1 h in the glovebox to form the top electrodes.
Device level electrical characterization: Devices are characterized using a Suss MicroTec Probe Station connected to a 4200-SCS Keithley semiconductor analyzer and B2902A source measure unit (SMU).
XPS measurements: Inkjet-printed MoS2 samples are sent to the Harwell XPS Center for characterization.
BDT treatment procedure: MoS2 layers are deposited on a paper substrate with evaporated gold electrodes via inkjet printing. The samples are then transferred into a nitrogen-filled glove box. Inside the glove box, a 50 mM BDT solution in anhydrous hexane is prepared, and the samples are gently immersed in this solution. The container is sealed and left to sit for 24 h. Afterwards, the samples are soaked and gently rinsed in anhydrous hexane. Subsequently, the samples are annealed at 75°C for an hour within the nitrogen glove box. Finally, silver electrodes are printed.
Device recycling process: The memristors that are printed on PEL60 printing paper are subjected to bath sonication in 5 mL of triethylene glycol monomethyl ether for Ag electrode removal. Following this, the paper is removed, gently rinsed with IPA, and allowed to dry. The triethylene glycol monomethyl ether-Ag nanoparticle dispersion produced from this process then undergoes vacuum filtration, with the filtrate, containing the silver nanoparticles, being collected and subjected to a 15-min bath sonication.
Bath sonication in 5 mL of IPA is performed on the dried PEL60 printing paper to detach the inkjet-printed MoS2. The paper is then removed and rinsed with IPA in preparation for re-printing. The filter paper from the first vacuum filtration step is also immersed in IPA and subjected to ultrasonic treatment to recover any MoS2 flakes that may have detached along with the Ag electrode and been retained by the filter paper. The resulting dispersion is subjected to solvent exchange via high-speed centrifugation for the dispersion of MoS2 in NMP. Following this, a second vacuum filtration step is performed. The precipitate collected on the filter paper, which consists of MoS2 flakes, is then immersed in IPA and subjected to a 15-min bath sonication.
Simulation of DR screening: To leverage the difference between the conductance values of synaptic devices, errors between the output vector and ground truth are backpropagated to each layer during the weight updating process. Here, weights are either potentiated or depressed according to the output of a sign function. A three-layer multi-layer-perceptron (81 × 16 × 2) is constructed and trained on the DiaretDB1 dataset, following a three-stage system flow with parametric changes and a confidence level of 75%. A multi-layer perceptron (MLP) is an advanced type of neural network that consists of multiple layers of perceptrons (a basic unit that computes weighted inputs via an activation function), each layer connected to the next. It is capable of learning complex functions by having multiple layers of neurons, each applying nonlinear transformations to the input data. Initially, the removal of backgrounds comprising optic disc and vasculature from the fundus images is conducted. Subsequently, a feature extraction phase is implemented, wherein the structural, color, and derivative attributes of candidate lesions are calculated and transformed into 81-dimensional vectors. Lastly, the entire system is trained on these vectors over a course of 1000 epochs.
ACKNOWLEDGMENTS
M.X. and N.M. acknowledge support from Engineering and Physical Sciences Research Council (EP/T014601/1, EP/L016087/1). B.Z. and F.T. acknowledges support from China Scholarship Council. G.Y. acknowledges support from Royal Society. G.P. acknowledge support from Marie Vergottis Cambridge Trust and the Jesus College Embiricos Trust. Cambridge Royce facilities (EP/P024947/1) and Sir Henry Royce Institute - recurrent (EP/R00661X/1).
CONFLICT OF INTEREST STATEMENT
The authors declare no conflict of interest.
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Abstract
Reconfigurable memristors featuring neural and synaptic functions hold great potential for neuromorphic circuits by simplifying system architecture, cutting power consumption, and boosting computational efficiency. Building upon these attributes, their additive manufacturing on sustainable substrates further offers unique advantages for future electronics, including low environmental impact. Here, exploiting the structure–property relationship of inkjet‐printed MoS2 nanoflake‐based resistive layer, we present paper‐based reconfigurable memristors. We demonstrate a sustainable process covering material exfoliation, device fabrication, and device recycling. With >90% yield from a 16 × 65 device array, our memristors demonstrate robust resistive switching, with >105 ON–OFF ratio and <0.5 V operation in non‐volatile state. Through modulation of compliance current, the devices transition into a volatile state, with only 50 pW switching power consumption. These performances rival state‐of‐the‐art metal oxide‐based counterparts. We show device recyclability and stable, reconfigurable operation following disassembly, material collection and re‐fabrication. We further demonstrate synaptic plasticity and neuronal leaky integrate‐and‐fire functionality, with disposable applications in smart packaging and simulated medical image diagnostics. Our work shows a sustainable pathway toward printable, reconfigurable neuromorphic devices, with minimal environmental footprints.
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1 Cambridge Graphene Centre, University of Cambridge, Cambridge, UK
2 Department of Materials Science & Metallurgy, University of Cambridge, Cambridge, UK
3 Cambridge Graphene Centre, University of Cambridge, Cambridge, UK, School of Micro‐Nano Electronics, ZJU‐Hangzhou Global Scientific and Technological Innovation Center, State Key Laboratory of Silicon and Advanced Semiconductor Materials, ZJU—UIUC Joint Institute, Zhejiang University, Hangzhou, the People's Republic of China
4 School of Micro‐Nano Electronics, ZJU‐Hangzhou Global Scientific and Technological Innovation Center, State Key Laboratory of Silicon and Advanced Semiconductor Materials, ZJU—UIUC Joint Institute, Zhejiang University, Hangzhou, the People's Republic of China