Analysis and Design of High-Efficiency Bidirectional GaN-Based CLLC Resonant Converter

Abstract

A bidirectional CLLC resonant converter (CLLC-BRC) based on GaN transistors is analyzed and designed in this paper. Similar resonant topologies are listed and commented on, with the CLLC topology showing competitiveness in bidirectional energy transmission. The analysis of the aforementioned converter has been provided, including the reveal of resonant frequencies of the CLLC topology and an improved zero-voltage switching (ZVS) condition with operation principles of the reverse mode and relevant parasitic parameters taken into account. The design methodology of the aforementioned converter based on pulse frequency modulation (PFM) is further discussed in detail. A prototype with a rated power of 400 W and a maximal operating frequency that is larger than 0.5 MHz was built to verify the proposed design methodology. The highest conversion efficiency of the prototype was 97.02% in the forward mode, and it was 95.96% in the reverse mode.

1. Introduction

Bidirectional DC/DC converters (BDCs) play an important role in many fields, including new energy generation systems, electric vehicles, aerospace power supplies and uninterruptible power supplies. An isolated type of BDC is usually accepted instead of a non-isolated one, as shown in Figure 1, since the aforementioned fields have strict requirements for safety.

Many isolated BDCs focus on soft switching to reduce loss due to its high operating frequency aiming for high power density, which are mainly divided into the phase shift control type [1,2] and the resonant type [3,4]. The gain range of the phase shift control type is limited, and soft switching of the full load range is hard achieve. By contrast, the LLC resonant converter is a topology of three resonant components that can achieve zero-voltage switching (ZVS) in the inverter-side of the full load range without any auxiliary circuits. In order to achieve bidirectional energy transmission, the diodes of its rectifier bridge are replaced with fully controlled devices. In [5], all the topologies of three resonant components are listed, including Type-4 and Type-11, as shown in Figure 2a,b. However, similar bidirectional voltage gain characteristics cannot be obtained in the two types. For example, when the LLC resonant circuit operates in the reverse mode, it degenerates into a LC resonant circuit, with normalized dc gain below 1. In [6,7,8,9,10,11,12], a symmetric tank structure called CLLLC is proposed, as shown in Figure 2c. Although similar bidirectional voltage gain features are obtained, too many resonant components are used in CLLLC, which increases the volume of the converter and the error of analysis and design. What’s more, the procedures of designing parameters [6] and controllers [7] are complicated, with the potential for risky operations caused by parasitic capacitance [12], leading to deviations from the design intention. In [13,14], a resonant tank of four elements called CLLC is proposed, as shown in Figure 2d. In contrast to the CLLLC topology, one resonant inductor is omitted in the CLLC topology, and similar bidirectional voltage gain features are obtained. The CLLC-BRC can achieve ZVS in the inverter side of the full-load range, and zero-current switching (ZCS) in the rectifier side of a certain load range. Additionally, the range of bidirectional DC gains is expanded, leading to more flexible capacity of voltage regulation. In [14], the forward mode and the reverse mode are equivalent to Type-4 and Type-11 with additional capacitors respectively. However, different basic frequencies are used for the two modes, with some features in common ignored. The current research on CLLC-BRC still needs to be improved, such as calculation of resonant frequencies of the CLLC topology, more thorough soft switching condition and so on.

Moreover, with the continuous development of semiconductor technology, the third generation of wide-bandgap semiconductor devices, including gallium nitride (GaN) devices and silicon carbide (SiC) devices, have been developed to help BDCs achieve higher frequency, higher power density, and higher efficiency, replacing conventional devices like Si MOSFETs. A summary of the material characteristics of these devices is shown in [9]. GaN has higher energy gap and electron velocity in contrast to SiC and Si, and thus GaN transistors possess better performance of lower on-resistance, faster switching speed, lower parasitic parameters, lower reverse recovery loss and so on. GaN transistors are suitable for even MHz-level operating frequency occasions that are difficult for application of SiC devices with high efficiency. It is well expected that GaN transistors deserve to replace other devices in low or medium power occasions. However, GaN transistors have a lower driving voltage threshold than SiC devices and thus have a high requirement for designing driving circuits to prevent wrong conduction. Meanwhile, GaN transistors have a larger reverse conduction voltage drop than SiC devices when no driving voltage is supplied, and thus synchronous rectification (SR) must be applied in the rectifier-side of BDC, whose accuracy affects the quality of output voltage and efficiency. Due to these problems, it is meaningful to study the application of GaN transistors in different BDC topologies that have already been equipped with MOSFETs. In [15,16,17,18,19,20], GaN transistors are applied to the conventional LLC resonant converter. However, it is hard to meet the bidirectional application requirement with the limitation of the LLC topology in the reverse mode. In [9], GaN transistors were applied to the bidirectional CLLLC resonant converter with parameters based on the design methodology proposed in [6]. However, complicated principles and the high design requirements of the CLLLC converter disturb the successful application of GaN transistors. Current solutions of replacing all conventional switching devices with GaN transistors in BDCs are still unsatisfying.

Therefore, this paper focuses on CLLC-BRCs of high operating frequency and high efficiency based on GaN transistors. In Section 2, the characteristics of CLLC-BRC are discussed in detail based on its operation principles, including the solution of resonant frequencies, definitions of auxiliary parameters and an improved ZVS condition of the inverter-side switches. In Section 3, the design procedures of GaN-based CLLC-BRC based on PFM are presented with assistance of the previous analysis. Then, the structure of the prototype and experimental results are shown in Section 4. Finally, conclusions are made in Section 5.

2. Analysis of Bidirectional CLLC Resonant Converter

The structure of GaN-based CLLC-BRC is shown in Figure 3. In [14], the operation principles of both the forward mode (MT-4 mode) and the reverse mode (MT-11 mode) of CLLC-BRC have been illustrated in detail, which thus will not be restated in this paper. However, different reference frequencies were used in the normalized dc gain curves of the two modes in [14], which conceals some critical features of CLLC topology, like the same resonant frequencies possessed by the two modes. Based on the first harmonic approximation (FHA) method, the following analysis is given.

2.1. Resonant Frequencies of Bidirectional CLLC Resonant Converter

The equivalent circuit of the forward mode is shown in Figure 4a, where_Cr2e=_Cr2ⁿ²is the normalized capacitor of_Cr2, and_Ref=8^π2n2 _RL1is the normalized equivalent AC resistance of the forward-mode load_RL1 . It can be further converted into the topology in Figure 4b based on Thevenin’s theorem, where the equivalent tank voltage_V1tankand the total tank impedance_Z1tankcan be derived as:

_V1tank=_{V1ωs Lmωs Lm}+_{ωs Lr}−1_{ωs Cr1}

_Z1tank=1j_{ωs Cr2e}+j_{ωs Lm}/(j_{ωs Lr}+1j_{ωs Cr1})=j_{Lm Lr Cr1 Cr2e ωs4}−(_{Lm Cr1}+_{Lm Cr2e}+_{Lr Cr1})_ωs2+1_{ωs2 Cr1 Cr2e}(_{ωs Lm}+_{ωs Lr}−1_{ωs Cr1})

where_ωs=2π_fsand_fsis the operating frequency of CLLC-BRC.

The total impendence is in the state of pure resistance when the CLLC-BRC operates at the resonant frequencies. That is to say,_Z1tank=0, i.e.:

_{Lm Lr Cr1 Cr2e ωs4}−(_{Lm Cr1}+_{Lm Cr2e}+_{Lr Cr1})_ωs2+1=0

Apparently, there exist two resonant frequencies in the forward mode, which can be defined as_fr1and_fr2(_fr1<_fr2 ). Meanwhile, the equivalent circuits of the reverse mode of CLLC-BRC are shown in Figure 4c,d, where_Rer=8^π2_RL2is the equivalent ac resistance of the reverse-mode load_RL2. Similarly,_V2tankand_Z2tankcan be derived as:

_V2tank=_{nV2ωs Lmωs Lm}−1_{ωs Cr2e}

_Z2tank=j_{Lm Lr Cr1 Cr2e ωs4}−(_{Lm Cr1}+_{Lm Cr2e}+_{Lr Cr1})_ωs2+1_{ωs2 Cr1 Cr2e}(_{ωs Lm}−1_{ωs Cr2e})

When the CLLC-BRC operates at the resonant frequencies, the same reason leads to_Z2tank=0, i.e., condition (3). That is to say, the same resonant frequencies are possessed by both the forward mode and the reverse mode.

Defininga=_{Lm Lr Cr1 Cr2e},b=−(_{Lm Cr1}+_{Lm Cr2e}+_{Lr Cr1})andc=1, with permanent^b2−4ac>0, resonant frequencies of the two modes, i.e.,_fr1and_fr2, can be derived from Equation (3) as:

_fr1=_ωs2/2π=−b−^b2−4ac2a/2π, _fr2=−b+^b2−4ac2a/2π

2.2. Auxiliary Parameters

To simplify the analysis, some critical auxiliary parameters deserve to be defined, with their expressions and meanings shown in Table 1.

Therefore, based on the FHA method, normalized dc gain_Gfof the forward mode and_Grof the reverse mode can be expressed respectively as:

|_Gf|=|_nV2V1|=^{|f2−1_Ln·f2+1+j{_Q1·[_{Cn Ln} f4−(_{Cn Ln}+_Ln+1)f2+1]_{Cn Ln} f3}|−1}

|_Gr|=|_V1nV2|=^{|1−1_{Cn Ln} f2+j{_Q2·[_{Cn Ln} f4−(_{Cn Ln}+_Ln+1)f2+1]f3 _LnCn}|−1}

Meanwhile, Equation (3) can be simplified based on Table 1 as:

_{Cn Ln} ^f4−(_{Cn Ln}+_Ln+1)^f2+1=0

Definingp=_{Cn Ln},q=−(_{Cn Ln}+_Ln+1), the normalized resonant frequencies_f1and_f2can be expressed as:

_f1=−q−^q2−4p2p, _f2=−q+^q2−4p2p

With the help of auxiliary parameters, more simplified analysis results were obtained. In addition, normalized DC gain is only decided by_Q1,_Q2,_Cn,_Lnand f, which will be discussed in the following design methodology in detail.

2.3. Improved Zero-Voltage Switching Condition for Bidirectional CLLC Resonant Converter

In order to realize ZVS of the inverter-side switches, their parasitic capacitors should be completely charged and discharged within the dead time. In contrast to ZVS conditions in [6,14], an improved condition of ZVS with relevant parasitic parameters and dead-time processes of both the forward mode and the reverse mode taken into account is provided in this paper. Based on the operation principles of CLLC-BRC, the following assumptions were made:

• The operating frequency_fsis very close to the resonant frequency_fr2aiming for optimal operation, with continuous current in the inverter side;

• The process of charging and discharging parasitic capacitance is extremely short with constant inverter-side current taken into account.

Figure 5a shows the critical waveforms about charging and discharging parasitic capacitance in the forward mode. Based on the FHA method, the initial inverter-side current in the dead time of the forward mode, i.e., the constant current in the dead time, can be expressed as:

_{Idead_f}=12_∫0t1n_V2−_uCr2Lmdt, _uCr2=_UCr2cos(2π_fst+φ)

where_UCr2is the peak voltage on_Cr2.

As for the rectifier-side current_iCr2, it is clear that:

_iCr2=_Cr2duCr2dt, _iCr2(0)=0

Therefore,_{Idead_f}can be estimated from (11~12) as:

_{Idead_f}=_{nV2 t12Lm}≈_{nV24fs Lm}

Figure 5c shows the equivalent circuit of charging and discharging parasitic capacitance in the forward mode, where_C1=_C2=_C3=_C4=_Coss1with_Coss1, that is the parasitic capacitance of the high-voltage side switches, and_C5=_C6=_C7=_C8=_Coss2. with_Coss2that is the parasitic capacitance of the low-voltage side switches, and_CTris the equivalent parasitic capacitance of the transformer. In order to guarantee ZVS, it is required that:

_{Idead_f tdeadCeff}>Δ_uAB=_2V1

where_Ceff=_Coss1+_CTr+_Coss2/ⁿ²is the equivalent capacitance of the inverter-side in the forward mode.

Similar analysis was done for the reverse mode. Figure 5b shows the critical waveforms about charging and discharging parasitic capacitance in the reverse mode. The constant inverter-side current in the dead time of the reverse mode can be expressed as:

_{Idead_r}=12_∫0t1V1−_uCr1−_uLrLmdt, _uCr1=_UCr1cos(2π_fst+φ)

where_UCr1is the peak voltage on_Cr1.

As for the rectifier-side current_iLr, it is clear that:

_iLr=_Cr1duCr1dt, _uLr=_LrdiLrdt,_iLr(0)=0

Therefore,_{Idead_r}can be estimated from Equations (15) and (16) as:

_{Idead_r}=_{V1 t12Lm}≈_{V14fs Lm}

Figure 5d shows the equivalent circuit of charging and discharging parasitic capacitance in the reverse mode. In order to guarantee ZVS, it is required that:

_{Idead_r tdeadCeff2}>Δ_uCD=_2nV2

where_Ceff2=_Ceffis the equivalent capacitance of the inverter-side in the reverse mode.

Therefore, the final ZVS condition of CLLC-BRC can be expressed as:

_Lm<min{_{nV2 tdead8fs V1 Ceff},_{V1 tdead8fs nV2 Ceff}}

Based on the requirements of Equation (19),_Lmshould be set as large as possible, so as to reduce the peak of excitation current and dead-time loss. Apparently, lower parasitic capacitance benefits the realization of soft switching, which strengthens the demand for GaN transistors in CLLC-BRCs.

3. Design Methodology of GaN-Based Bidirectional CLLC Resonant Converter 3.1. Design Procedures

We take the procedures of designing the prototype as an example to illustrate the flow chart of designing GaN-based CLLC-BRC, as shown in Figure 6. Design requirements of the prototype are shown in Table 2.

The proposed design methodology was based on PFM control method for CLLC-BRC. The initial transformer ratio n could be set as_V1N/_V2N, and then normalized DC gain ranges[_Gfmin, _Gfmax]of the forward mode and[_Grmin, _Grmax]of the reverse mode were obtained with ripples and voltage drop on GaN transistors taken into account. Then, we preset a minimal normalized operating frequency_fmin.

Figure 7 shows the relation between normalized DC gain and normalized operating frequency f (Table 1) in the bidirectional modes under parameter sweep of quality factor with_Ln=2.6and_Cn=1.5. Apparently, the rise in quality factor les to a drop in the whole level of dc gain, and the whole level of_Grwas higher than that of_Gf. Therefore, it is important to guarantee that_Gfmaxis reached when_Q1reaches its designed maximum_Q1maxandf=_fmin. Assuming_Q1max=0.4, it is clear that_Gfmaxshould be slightly below_Grmax, otherwise it cannot be reached when_Q1=_Q1maxandf=_fmin, which leads to adjusting the ratio n properly.

After ratio n and_fminwas obtained, we preset a_Cn. Then,_Q1maxand_Lnneeded setting. It was better to obtain the curves of relation between_Q1maxand peak normalized DC gain_Gfpeakof the forward mode with parameter sweep of_Ln , as shown in Figure 8a. Setting_Lnwas limited by_Gfpeak>_Gfmax, which shall be considered when setting_Q1max. A proper_Ln can be further decided by Figure 8b after_Q1maxis set. It needed to be guaranteed that the forward-mode dc gain range[_Gfmin, _Gfmax]was met within[_fmin, _fmax], where_fmaxwas the designed maximal normalized operating frequency. In other words,_fmaxwas determined by_Lnand the requirement of DC gain range. It was well expected that_fminand_fmaxare not far away from the normalized resonant frequency_f2decided by_Lnand_Cn to decrease loss. A drop in L_n will lead to a rise in the steepness of the gain curve and thus decrease in |f_max − f_min|, but it will also lead to rise in excitation current and dead-time loss. If it is hard to get proper_Q1maxand_Ln, the previous steps need to be redone. It was noted that_Cnneeded to be further verified and adjusted in combination with the reverse mode due to its effect on_fm2.

In order to get the actual frequency range, basic frequency_fnneeded to be set. According to the ceiling of operating frequency_fsmax,_fnis determined by:

_fn=12π_{Lr Cr1}=_fsmaxfmax

Therefore, values of_Lm,_Lr,_Cr1and_Cr2could be derived from_Ln,_Cn,_Q1max,_fnand relevant expressions. Then, it needed to be verified whether_Lmsatisfied condition (19), and measure the gain curve of the reverse mode, which can be adjusted according to the above design rules. It should be pointed out that the adjustment of any parameter will affect the forward and reverse DC gains at the same time, and a better design result can only be obtained by continuous adjustment.

3.2. Parameters of the Prototype

According to the previous analysis, the ratio of the transformer could be set asn=7 , and the parameters of the resonant elements are shown in Table 3, where the voltage and current stress could be obtained by the FHA method. The working-frequency ranges were [298 kHz, 472 kHz] of the forward mode and [271 kHz, 548 kHz] of the reverse mode. The values of resonant frequencies were:_fm1=131.60 kHz,_fm2=164.09 kHz,_fr1=106.09 kHz, and_fr2=407.08 kHz.

4. Experimental Verification

The structure of the prototype is shown in Figure 9, with its performance shown in Table 2, and its main components shown in Table 4. It used TI’s UCD138 as a digital controller of the converter on the control board. Compared with the DSP/MCU completely managed by software like TMS320F28335 used in [9], UCD138 has access to high-speed control circuit, multi-loop control and solution of SR, with its three modes switched automatically to meet the requirement of SR in variable frequencies. In the high-voltage side, the isolated driving chip Si8273 was accepted to drive GaN transistors. In the low-voltage side, the non-isolated chip TI’s LMG1205YFXR was used as a driver. The dead time was set as 100 ns based on the used GaN transistors.

One of the biggest obstacles for application of GaN transistors is to design the driving circuit properly, which is discussed in [21] in detail. Meanwhile, it was necessary to implement SR for the rectifier-side GaN transistors due to its comparatively large reverse voltage drop. On-time of rectifier-side GaN transistors can be set as_1/(2fr2)when the operating frequency_fsis below_fr2and as_1/(2fs)when_fs≥_fr2 , derived from the principles of CLLC-BRC in [14].

The experimental results show that the operating frequency range was[312 kHz, 435 kHz]of the forward mode, and it was[303 kHz, 556 kHz] of the reverse mode. Main waveforms at the maximal and minimal operating frequencies of the two modes are shown in Figure 10 and Figure 11, where_iLris the current of the high-voltage side and_iTr2is the current of the low-voltage side. ZVS of GaN transistors of the whole operating frequency range in the inverter side can be realized in both the two modes. ZCS of GaN transistors in the rectifier side can be realized when_fs<_fr2, but cannot be realized when_fs>_fr2 , as shown in Figure 10c,d for the forward mode and in Figure 11c,d for the reverse mode. As shown in Figure 12, the converter achieved a maximal efficiency of 97.02% in the forward mode with the output power of 384 W, and achieved a maximal efficiency of 95.96% in the reverse mode with the output power of 408 W. Efficiency of more than 95% was achieved near the rated power of 400 W in the two modes.

5. Conclusions

GaN transistors have the advantages of low on-resistance and parasitic parameters, fast switching speed, low reverse recovery loss and so on. The application of GaN transistors can further improve the frequency, efficiency and power density of the DC-DC converters. In contrast to GaN-based bidirectional CLLLC resonant converters, one resonant inductance was removed in CLLC-BRC, resulting in less loss of resonant components, less volume and more convenience for the design and control of the converter, with similar features of bidirectional conversion preserved. In the bidirectional operating modes of CLLC-BRC, zero-voltage switching of the inverter-side switches was realized under all load conditions, while zero-current switching of the rectifier-side switches was realized within a certain load range. In contrast to [14], more thorough analysis of CLLC-BRC with solution of resonant frequencies and improved ZVS condition is given in this paper. Also, more explicit and comprehensive design methodology based on PFM is displayed, with the whole level of operating frequency improved by GaN transistors. Experimental results of the prototype with a rated power of 400 W have proved the validity of proposed design methodology, with the SR method for rectifier-side switches provided. The peak efficiency of the prototype was 97.02% in the forward mode, and 95.96% in the reverse mode, with the maximal operating frequency that is larger than 0.5 MHz.

Parameter	Expression	Meaning
Q1 ;Q2	Lr /Cr1Rer; Lr /Cr2eRef	Quality factor of the forward mode and the reverse mode, respectively
Cn	Cr2eCr1	Ratio of resonant capacitors
Ln	LmLr	Ratio of resonant inductors
fn	12πLr Cr1	Basic frequency
f	fsfn	Normalized operating frequency
fm1;fm2	12π(Lr+Lm)Cr1;12πLm Cr2e	Series inverter-side resonant frequencies of the forward mode and the reverse mode, respectively

Direction	Rated Power	High-Voltage Side/V1	Low-Voltage Side/V2	Output	Ripple
Forward	400 W	[382 V, 408 V]V1N = 400 V	[48 V,56 V]V2N= 50 V	I2=8 A	ΔI2≤1%
Reverse	400 W	V1N= 400 V	[48 V,56 V] V2N= 50 V	V1=400 V	ΔV1≤1%

Element	Value	Voltage Stress	Current Stress/RMS
Cr1	8.0 nF	253 V	2.69 A
Cr2	812.6 nF	21 V	20.51 A
Lr	29.4 μH	210 V	2.69 A
Lm	88.2 μH	626 V	2.96 A

Components	Description	Quantity
GaN transistors	GS66502B, in the high-voltage side	4
	GS61004B, in the low-voltage side	4
Cr1	1 nF, 630 V	8
Cr2	47 nF, 100 V	17
	6.8 nF, 100 V	2
C11	47 uF, 450 V, series	2
C22	47 uF, 100 V, parallel	3
HF Transformer	Wound-type; n = 7:1; Primary Lm = 88.2 μH; Core material:DRM95	1

Author Contributions

Conceptualization, Y.L. (Yuanjun Liu); Formal analysis, Y.L. (Yuanjun Liu) and X.W.; Funding acquisition, G.D.; Investigation, Y.L. (Yuanjun Liu) and X.Y.; Supervision, G.D.; Validation, Y.L. (Yuanjun Liu) and G.D.; Writing-original draft, Y.L. (Yuanjun Liu); Writing-review & editing, Y.L. (Yuanjun Liu), G.D., X.W. and Y.L. (Yanxiong Lei).

Funding

This research was funded by Natural Science Foundation of Guangdong Province, China, grant number 2017B030312001.

Conflicts of Interest

The authors declare no conflict of interest.