Linear Active Disturbance Rejection Control of New Double Full-Bridge ZVZCS Converter for Beam Supply

Abstract

In view of the unstable output voltage of the new double full bridge ZVZCS converter of beam power supply when it is disturbed by external disturbance or internal parameter change in practical application, combined with the characteristics of the beam power supply system model, this paper proposes a beam power supply control strategy based on linear active disturbance rejection control (LADRC). Firstly, the working principle of the new double full bridge ZVZCS converter of beam power supply is analyzed, and considering the parasitic parameters and effective duty cycle of circuit components, the small signal equivalent model under two working modes is established. Secondly, combined with the system model and linear active disturbance rejection control theory, a double closed-loop controller is designed, which takes the second-order LADRC as the outer voltage loop and PI control as the inner current loop. Finally, the simulation and experimental results show that the designed controller has stronger robustness, anti-interference and better dynamic response speed than the traditional double closed-loop PI controller in load switching and dual-mode switching, and has a good development prospect.

1. Introduction

Due to its advantage of high specific impulse, electric propulsion technology has been widely used in the field of aerospace at home and abroad [1,2]. Among them, the Power Processing Unit (PPU) is mainly used to provide various voltages and currents required for ion thrusters, including heating, ignition, and ion acceleration, etc., which is the core of ion electric propulsion technology [3,4]. A typical ion thruster PPU consists of a beam supply, an accelerating power supply, an anode power supply, a cathode heating power supply, a cathode ignition power supply, a neutralizer cathode heating power supply, a neutralizer contact power supply, and a neutralizer cathode ignition power supply. The main function of the beam supply is to provide voltage and power to establish the electric field between the two gates of the thruster and the acceleration of Xenon ions. The output voltage can reach 2 kV, and the output power can reach 10 kW, accounting for more than 80% of the output power of the entire PPU, and it is the key point of the PPU design with high efficiency and high reliability [5,6,7,8].

At present, according to the different application environments at home and abroad, the research on the beam supply is mainly shown in the topology structure and control methods. Astrium’s ion thruster beam supply adopts a resonant DC/DC topology for the main circuit, and a push-pull topology for the second conversion circuit to achieve small-range voltage regulation. The topology design is a single control loop, which cannot control the current of the system [9,10,11]. A non-resonant full-bridge circuit is adopted for the beam supply of the thruster of “Deep Space No. 1”, which can meet the wide dynamic range and high power demand. Due to the hard switch, the PPU efficiency will be greatly reduced due to heat consumption [12,13]. The domestically designed LIP-300 ion thruster beam supply is composed of three 500 V/1500 W power supply modules in series. The phase-shifting full-bridge topology is adopted to realize zero voltage and zero current switching (ZVZCS) technology, which reduces the switching loss of the switch tube and improves the product efficiency, keeping the same with foreign countries [14,15].

When the spacecraft is performing space flight missions, different mission stages (such as position maintenance, orbit transfer, attitude control, etc.) require different thrust forces, which require the ion thruster to work in multiple modes. That is, different stages require different thrust forces [15]. Moreover, a wide range of light intensity and temperature will cause a wide range of variations in output power and voltage of the solar array, so an electric propulsion system is required to realize a wide range of multi-point operations [16,17,18].

Therefore, different from other switching power supplies, beam supply has the following main characteristics. The first is to require itself to have the characteristics of short-time high-power output. Second, its load characteristics vary greatly. The third is the multi-mode operation. To improve the performance of the control system and ensure the spacecraft running continuously and stably in orbit, the beam supply usually adopts a mature double closed-loop PI control system of outer voltage loop and inner current loop. However, in space applications, the nonlinear dynamics of the DC converter are quite complex, and it is vulnerable to electromagnetic interference, input line interference, load interference, single-particle flip interference, and so on. In other words, when the system is subject to external disturbance and internal parameters change, the control effect of the double closed-loop PI control system will significantly decrease [19,20].

In the 1980s, researcher Jingqing Han put forward a new nonlinear Control theory, Active Disturbance Rejection Control (ADRC), based on the in-depth study of PID Control. The core idea is that all the uncertain factors acting on the controlled object are reduced to unknown disturbances, and the input and output data are estimated and compensated by the extended observer to improve the disturbance rejection performance and parameter robustness of the system [21,22]. ADRC technology, as a practical design method, has been successfully applied in various engineering fields, especially in high-speed and high-precision control and occasions with obvious external disturbances [23,24,25,26,27]. However, the nonlinear function is introduced into the controller, which increases the complexity of parameter tuning to some extent. To simplify parameter tuning and apply it quickly in practical engineering, Professor Zhiqiang Gao puts forward Linear Active Disturbance Rejection Control (LADRC). The linear function is adopted to control the system, and a new bandwidth parameterization technology is adopted to greatly simplify the parameter setting process [28,29,30]. Many studies have shown that LADRC has not only stronger robustness and disturbance rejection performance but also easy parameter tuning, so it has been successfully applied in many projects [31,32,33,34,35,36,37,38,39].

This paper proposes a new control strategy for beam power supply, that is, a double closed-loop control strategy with LADRC as the outer voltage loop and PI control as the inner current loop, and builds a simulation and experimental platform. Simulation and experiments show that the designed controller has good parameter robustness and anti-interference performance. The structure of this paper is as follows: Section 1 analyzes the working principle of the new double full bridge ZVZCS converter of beam power supply; Section 2 introduces the design of the LADRC controller based on the previous modeling work [40]; in Section 3, the simulation model is built in MATLAB/Simulink; Section 4 gives the experimental results; and Section 5 summarizes the full text.

2. Working Principle of a New Double Full Bridge ZVZCS Converter with Beam Power Supply

2.1. Converter Topology

The topology of the new double full-bridge ZVZCS converter of the beam supply is shown in Figure 1. MOSFET S₁, S₂, S₃, S₄, blocking capacitor C_b, resonant inductor L_r1, and high-frequency transformer T₁ constitute the first bridge; MOSFET S₅, S₆, S₇, S₈, resonant inductor L_r2, and high frequency transformer T₂ form the second bridge; rectifier diodes D₁, D₂, D₃, D₄, D₅, and D₆ form a hybrid rectifier bridge. The inductance L_o and the capacitance C_o are used as the output filtering part.

The converter operates in two modes: duty cycle mode and phase shift mode. In duty cycle mode, the two full bridges are input in parallel, and the auxiliary side of the high-frequency transformer is output in parallel. The output voltage is controlled by controlling the duty cycle. The conduction schematic diagram of the first half and the second half period are shown in Figure 2 and Figure 3. In the phase shift mode, the two full bridges are input in parallel, and the auxiliary side of the high-frequency transformer is output in series. The output voltage is controlled by controlling the phase shift angle. The ZVZCS soft switching technology is realized to reduce power consumption and improve the efficiency of the converter. Figure 4 and Figure 5 are the conduction schematics of the first half period and the second half period. The structure of input parallel, output series, and parallel can effectively reduce the current stress of the MOSFET and meet the requirements of the wide range voltage output of the beam supply under the condition of the variable thrust of the thruster to the maximum extent [41,42,43]. The converter can achieve an 80–160 V wide range of DC input, 0–1800 V wide range of DC output, single power 2 kW, suitable for low-voltage large current input, high-voltage output occasions, and can improve the power of the whole machine through multi-module current sharing technology. The hybrid rectifier bridge does not require additional components to prevent the reverse flow of the primary current during the commutation interval, which not only minimizes the duty ratio loss and on-loss but also reduces the cost. In addition, the low voltage stress of the intermediate bridge-arm shared diode is also obtained [44,45,46].

2.2. Small-Signal Model of the Converter

To study the characteristics of the converter and improve its rapidness and stability, the small-signal modeling of the new double-full-bridge soft-switching converter is carried out by using the state-space averaging method and considering the parasitic resistance of the output filter inductor and the output filter capacitor. This task has been completed in the early stage, and the results are directly presented in this paper. The detailed modeling process can be found in the literature [40].

Small signal equivalent models of duty cycle mode and phase shift mode are shown in Figure 6 and Figure 7, and the modeling results are shown in Formulas (1) and (2).

(1)$\{\begin{array}{l}\begin{array}{l}{G}_{vd}(s)=\frac{{\widehat{v}}_o(s)}{\widehat{d}(s)}|\begin{array}{c}\\ {\widehat{v}}_{in}(s)=0\end{array}\\ =\frac{n{V}_{in}R(sC{R}_C+1)}{s^{2}LC(R+R_C)+s[C(R_{L}R+R_C{R}_L+R{R}_C)+L]+R+R_L}\\ G_{id}(s)=\frac{{\widehat{i}}_L(s)}{\widehat{d}(s)}|\begin{array}{c}\\ {\widehat{v}}_{in}(s)=0\end{array}\\ =\frac{n{V}_{in}\left[s{C}_{\mathrm{o}}{\left(R+R_C\right)}^2+R+R_C\right]}{s^2{L}_o{C}_o{(R+R_C)}^2+s\left[C_o\left(R_L{\left(R+R_C\right)}^2+R^2{R}_C+R{R}_C^2\right)+L_o\left(R+R_C\right)\right]+R_L\left(R+R_C\right)+R{R}_C+R^2}\end{array}\hfill \\ \begin{array}{l}{G}_{oi}(s)=\frac{{\widehat{v}}_o(s)}{{\widehat{v}}_{in}(s)}|\begin{array}{c}\\ \widehat{d}(s)=0\end{array}\\ =\frac{nDR(sC{R}_C+1)}{s^{2}LC(R+R_C)+s[C(R_{L}R+R_C{R}_L+R{R}_C)+L]+R+R_L}\end{array}\hfill \\ \begin{array}{l}{Z}_{in}(s)=\frac{{\widehat{v}}_{in}(s)}{{\widehat{i}}_{in}(s)}|\begin{array}{c}\\ \widehat{d}(s)=0\end{array}\\ =\frac{s^{2}LC(R+R_C)+s[C(R_{L}R+R_C{R}_L+R{R}_C)+L]+R+R_L}{n{D}^2[sC(R+R_C)+1]}\end{array}\hfill \\ \begin{array}{l}{Z}_o(s)=\frac{{\widehat{v}}_o(s)}{{\widehat{i}}_L(s)}|\begin{array}{c}\\ \widehat{d}(s)=0\end{array}\\ =\frac{s^2{L}_o{C}_o{R}_{C}R+s\left(LR+C{R}_C{R}_{L}R\right)+R_{L}R}{s^2{L}_o{C}_o(R+R_C)+s\left[C\left(R_{L}R+R_C{R}_L+L\right)\right]+R_L}\end{array}\hfill \end{array},$

(2)$\{\begin{array}{l}\begin{array}{l}{G}_{vd}(s)=\frac{{\widehat{v}}_o(s)}{\widehat{d}(s)}|\begin{array}{c}\\ {\widehat{v}}_{in}(s)=0\end{array}\\ =\frac{2n{V}_{in}\left(1+s{C}_o{R}_C\right)}{s^2{L}_o{C}_o\left(1+\frac{R_C}{R}\right)+s\frac{L_o}{R}+s{C}_o\left(R_T+\frac{R_C{R}_T}{R}+R_C+R_L+\frac{R_C{R}_L}{R}\right)+\frac{R_T+R_L}{R}+1}\end{array}\hfill \\ \begin{array}{l}{G}_{oi}(s)=\frac{{\widehat{v}}_o(s)}{{\widehat{v}}_{in}(s)}|\begin{array}{c}\\ \widehat{d}(s)=0\end{array}\\ =\frac{2nD\left(1+s{C}_o{R}_C\right)}{s^2{L}_o{C}_o\left(1+\frac{R_C}{R}\right)+s\frac{L_o}{R}+s{C}_o\left(R_C+R_L+\frac{R_C{R}_L}{R}\right)+\frac{R_L}{R}+1}\\ G_{id}(s)=\frac{i_L(s)}{\widehat{d}(s)}|\begin{array}{c}\\ {\widehat{v}}_{in}(s)=0\end{array}\\ =\frac{2n{V}_{in}\left(s{C}_o(1+\frac{R_C}{R})+\frac{1}{R}\right)}{s^2{L}_o{C}_o\left(1+\frac{R_C}{R}\right)+s\frac{L_o}{R}+s{C}_o\left(R_C+R_L+R_T+\frac{R_C{R}_L}{R}+\frac{R_C{R}_T}{R}\right)+\frac{R_T+R_L}{R}+1}\\ Z_o(s)=\frac{{\widehat{v}}_o(s)}{{\widehat{i}}_L(s)}|\begin{array}{c}\\ \widehat{d}(s)=0\end{array}=\frac{R\left(1+s{C}_o{R}_C\right)}{s{C}_o(R+R_C)+1}\end{array}\hfill \end{array},$

3. Design of LADRC Controller

3.1. Structure of LADRC

At present, the control strategy used for beam supply is mature double closed-loop PI control. However, its control effect is significantly reduced due to the large load characteristic of the beam supply, the requirement of short time high-power output, and the interference of external and internal parameter changes. Therefore, good disturbance rejection performance and parameter robustness are the key characteristics of the beam supply. Active Disturbance Rejection Control (ADRC) technology can estimate and compensate for the unobservable and mismatched disturbances. Thus, it can better deal with the external and internal disturbances of the system and improve the robustness and anti-interference of the system. Therefore, in this paper, the outer voltage loop PI control is replaced by LADRC, and PI control is used as the inner current loop. The structure diagram of the control system is shown in Figure 8.

Aiming at the internal parameter disturbance and external disturbance of the beam power supply system, firstly, a second-order extended state observer (LESO) is designed to estimate the output voltage, the differential signal of the output voltage and the total disturbance of the system. Secondly, the linear state error feedback (LSEF) control rate is designed to calculate the error signal and the control quantity to realize the disturbance compensation of the system. Finally, the output of the LADRC controller is taken as the given current inner loop. After the calculation of the current inner loop PI, the controlled object will be precisely controlled to ensure the stable and effective operation of the beam supply.

3.2. Design of LADRC

The second-order controlled object is shown in Equation (3).

(3)$\ddot{y}=f(y,\dot{y},w(t),t)+bu=-a_1\dot{y}-a_{0}y+w+bu,$

where y and u are output and input, respectively, w is disturbance, a₁, a₀, and w are unknown, part b is known, and the known part is b₀, then Equation (3) is converted to Equation (4):

(4)$\ddot{y}=-a_1\dot{y}-a_{0}y+w+(b-b_0)u+b_{0}u=f+b_{0}u,$

where, $f=-a_1\dot{y}-a_{0}y+w+(b-b_0)u$ is the total of external and internal disturbances.

Select the state variable as shown in Equation (5).

(5)$\{\begin{array}{l}{x}_1=y\\ x_2=\dot{y}\\ x_3=f\end{array},$

Then the equation of state expression is shown in Equation (6).

(6)$\{\begin{array}{l}{\dot{x}}_1=x_2\\ {\dot{x}}_2=x_3+b_{0}u\\ {\dot{x}}_3=\dot{f}\\ y=x_1\end{array},$

The vector form is shown in Equation (7).

(7)$\{\begin{array}{l}\dot{\mathit{x}}=\mathit{A}\mathit{x}+\mathit{B}u+\mathit{E}\dot{f}\\ y=\mathit{C}\mathit{x}\end{array},$

where, $\mathit{A}=\left[\begin{array}{ccc}0& 1& 0\\ 0& 0& 1\\ 0& 0& 0\end{array}\right]$, $\mathit{B}=\left[\begin{array}{c}0\\ b_0\\ 0\end{array}\right]$, $\mathit{E}=\left[\begin{array}{c}0\\ 0\\ 1\end{array}\right]$, $\mathit{C}=\left[\begin{array}{ccc}1& 0& 0\end{array}\right]$. Then the representation of the extended observer is shown in Equation (8).

(8)$\{\begin{array}{l}e=z_1-y\\ {\dot{z}}_1=z_2-l_{1}e\\ {\dot{z}}_2=z_3+b_{0}u-l_{2}e\\ {\dot{z}}_3=-l_{3}e\end{array},$

where y is the output voltage, z₁ is the estimation of the output voltage, z₂ is the estimation of the differential signal of the output voltage, z₃ is the estimation of the total disturbance suffered by the grid power supply, and the parameters l₁, l₂, l₃ are the gain of the observer. According to the bandwidth method [29], the poles of the characteristic equation are placed at the same position, as shown in Equation (9).

(9)$\lambda (s)=|s\mathit{I}-(\mathit{A}-\mathit{L}\mathit{C})|={(s+w_{\mathrm{o}})}^3,$

Can be obtained:

(10)$\mathit{L}={\left[\begin{array}{ccc}3w_{\mathrm{o}}& 3w_{\mathrm{o}}{}^2& w_{\mathrm{o}}{}^3\end{array}\right]}^{\mathrm{T}},$

where, w_o is the bandwidth of the observer.

For the convenience of program operation, the discrete linear extended state observer is shown in Equation (11), and T is the sampling period.

(11)$\{\begin{array}{l}e(k)=z_1(k)-y(k)\\ z_1(k+1)=z_1(k)+T(z_2(k)-l_{1}e(k))\\ z_2(k+1)=z_2(k)+T(z_3(k)+b_{0}u(k)-l_{2}e(k))\\ z_3(k+1)=z_3(k)-T{l}_{3}e(k)\end{array},$

The total disturbance of the system is estimated by the linear state observer. The error control law is used to compensate the error feedback in real time, so as to improve the anti-interference ability of the system. The output z₁, z₂ of the observer and the input U_ref of the reference value are used as the input of the error feedback control rate. The designed error feedback control law is shown in Equation (12).

(12)$\{\begin{array}{l}{u}_0=k_p(u_{ref}-z_1)-k_d{z}_2\\ u=\frac{u_0-z_3}{b_0}\end{array},$

Because LESO can estimate and compensate the total disturbance in real time, the integrator used to eliminate the static error is no longer needed, and the error feedback control law adopts a simplified PD combination. Where u₀ is the output of LSEF, u is the output of control quantity, that is, the output of voltage loop, b₀ is the compensation coefficient, k_p and k_d are the gains of the controller, and the values are:

(13)$\{\begin{array}{l}{k}_p=w_c{}^2\\ k_d=2w_c\end{array},$

where w_c is the bandwidth of the controller.

For the convenience of program operation, the discrete linear extended state observer is shown in Equation (14):

(14)$\{\begin{array}{l}{u}_0(k)=k_p(u_{ref}(k)-z_1(k))-k_d{z}_2(k)\\ u(k)=\frac{u_0(k)-z_3(k)}{b_0}\end{array},$

Through the design of linear state observer and linear error feedback control rate, the setting parameters of LADRC are changed into three, which are: observer bandwidth w₀, controller bandwidth w_c, and compensation factor b₀.

4. Simulation Analysis

In order to further verify the performance of LADRC control, a simulation model is built in MATLAB/Simulink, including a double closed-loop controller with LADRC as the outer voltage loop and PI control as the inner current loop and a double closed-loop system with PI for both the outer voltage loop and the inner current loop. The integral of the time weighted absolute error (ITAE) index of the error signal is used to optimize the parameters of the PI controller. The rapidity, robustness, and anti-interference of the two controllers are compared. The parameters used in the simulation are shown in Table 1.

4.1. Step Response

The output voltage is set as 900 V, and the load is 2000 Ω. Response curves of the two controllers are shown in Figure 9 and Figure 10.

The simulation results show that both controllers can achieve stable output without static error, but the adjustment time of LADRC is faster, which is 1.9 ms, and the PI double closed-loop controller needs 3.5 ms. In the steady state, the output ripple of LADRC is smaller, and the standard deviation and range are smaller.

4.2. Anti Interference Analysis

When the input voltage is 100 V and the output voltage is 900 V, the initial output load is 2000 Ω, which suddenly changes to 4000 Ω at 0.01 s and 2000 Ω at 0.03 s. The waveforms of the output voltage and current are shown in Figure 11 and Figure 12.

It can be seen in Figure 11 and Figure 12 that the output voltage rises to a certain extent during 0.01 s load shedding, and the LADRC has a lower overshoot and faster convergence speed than PI control. When the load is increased to 0.03 s, the output voltage decreases to a certain extent, but compared with PI control, linear ADRC has smaller voltage overshoot and faster convergence speed. This shows that the LADRC controller has a stronger ability to suppress voltage drop and faster regulation time after sudden load addition and reduction, which coincides with the advantages of the LADRC controller. It can estimate the load disturbance and compensate it to improve the system’s anti-interference ability.

5. Experimental Verification

To verify the control effect of the LADRC controller under actual conditions, a 2 kW beam supply prototype is designed based on the TMS320F28335 core processor, as shown in Figure 13 and Figure 14. The experimental instruments used are as follows: DC electronic load, DC power supply, oscilloscope, high-voltage differential probe, current probe, beam supply experimental prototype, Kingview upper computer, etc. The two controllers’ performance was verified by the prototype’s reference mutation, load mutation, and dual mode switching experiments.

5.1. Hardware Design

The technical indicators of the converter and the parameters of the main components used are shown in Table 2 and Table 3. The specific design process is as follows.

• Transformer design;

The transformer transformation ratio is 1:10, and the calculation of primary winding n_p is shown in Equation (15). Where ∆B is the magnetic flux density and A_e is the effective cross-sectional area of the magnetic flux. The magnetic core selected in this paper is ETD59, and the corresponding parameters are: ∆B = 0.2 T, A_e = 368.4 mm². The calculation result is that the number of primary turns of transformer is n_p = 10.9. The actual number of primary turns is taken as 12 T, and the number of secondary turns is 120 T.

(15)$N_1=\frac{V_{\mathrm{in}\max }{10}^8}{4f_s\mathsf{\Delta }B{A}_{\mathrm{e}}},$

• 2.. Semiconductor device selection;

The voltage and current stress of inverter MOS tube and rectifier diode are shown in Table 4.

According to the parameters in Table 4, the MOS tube with model IXFH50N30Q3 (300 V/50 A) is selected as the switch tube on the inverter side, and the diode with model APT40DQ120BG (1200 V/40 A) is selected as the rectifier tube on the rectifier side.

• 3.. Design of DC isolating capacitor;

The calculation formula of the isolation capacitance is shown in Equation (16), in which the voltage drop of the isolation capacitance is taken as V_cbp = 10%V_in, so the calculated capacitance value is 4.4 μF. In practical application, two 2.2 μF capacitors are selected in parallel to improve the current carrying capacity.

(16)$C_b=\frac{I_o{D}_{\mathrm{eff}\max }}{4f_s{V}_{\mathrm{cbp}}K},$

5.2. Analysis of Experimental Results

• 4.. Load mutation test;

When the output voltage is 900 V and the load changes from 2000 Ω to 6000 Ω, the comparison of voltage and current under the two controllers is shown in Figure 15 and Figure 16, and the statistical table of the experimental results is shown in Table 5.

It can be seen that when the load current changes from 0.45 A to 0.15 A, the output voltage of the double closed-loop PI controller increases by 39 V, and the reference output is tracked within 38 ms. The output voltage of the LADRC controller increases by 20 V and converges within 20 ms.

When the output voltage is 900 V, the load resistance changes from 6000 Ω to 1500 Ω. A comparison of voltage and current under the two controllers is shown in Figure 17 and Figure 18. Data statistics of the sudden-increased load experiment results are shown in Table 6.

It can be seen that when the load current changes from 0.15 A to 0.6 A, the output voltage of the double closed-loop PI controller drops 40 V, and the reference output voltage is restored after 32.4 ms, and the adjustment time is relatively slow. The output voltage of the LADRC controller dropped by 30 V and recovered the reference output voltage after 17 ms. After the suddenly increased loading, the LADRC controller has a stronger ability to suppress voltage sags and faster adjustment time, which coincides with the advantages of the LADRC controller. It can estimate the load disturbance and compensate it to improve the anti-interference ability of the system.

• 5.. Dual mode switching experiment;

The input voltage is 80 V and the load resistance is 2000 Ω. The output voltage is switched from 300 V to 1100 V, that is, the parallel mode is switched to series mode. Output voltages of the two controllers are shown in Figure 19, Figure 20, Figure 21 and Figure 22. Data statistics of the experimental results of dual-mode switching are shown in Table 7 and Table 8.

Through comparison, it can be found that when the double closed-loop PI controller is switched from parallel mode to series mode, some jitter occurs at the switching point, and the adjustment time is relatively slow. The whole switching time is 64.8 ms and 78 ms. However, when the LADRC controller is switching between two modes, not only does no jitter occur, but also the adjustment time is very fast (21 ms and 74 ms), which realizes the smooth switching between the two modes. It can be seen that the system still has strong adaptability when the internal parameters change. LADRC reduces the uncertain factors acting on the controlled object to the unknown disturbance, and the method of estimating and compensating the input and output data through the extended observer has high robustness.

• 6.. Soft switching and efficiency test;

Switching loss is one of the main factors affecting the system efficiency. In order to maximize the system efficiency, ZVS soft switching is implemented in the phase-shifting mode in this paper. The soft switching experimental waveform is shown in Figure 23. The efficiency test was also conducted in this paper. As shown in Figure 24, the efficiency of the system when it works in the duty cycle mode is low, mainly because soft switching is not realized in the duty cycle mode, and the losses of switches and transformers are large. With the increase of the output power of the power supply, the system switches to the phase-shift mode and realizes ZVS, and the efficiency of the power supply increases.

6. Conclusions

For the new double full bridge ZVZCS converter of beam power supply, a new control strategy is proposed in this paper, which is a double closed-loop control structure with linear active disturbance rejection control as the outer voltage loop and PI control as the inner current loop; In order to verify the performance of the designed controller, a simulation model is built in MATLAB/Simulink, and a 2 kW experimental prototype is designed based on DSP28335. The simulation and experimental results show that the proposed control strategy has stronger robustness and anti-interference than the traditional double closed-loop PI control strategy. The system also realizes ZVS soft switching, and the maximum efficiency of the system can reach 97% in phase-shifting mode.

Author Contributions

Conceptualization, H.D. and H.W.; methodology, H.W.; software, H.W. and G.L.; validation, H.W.; formal analysis, H.W. and G.L.; investigation, H.D. and H.W.; resources, H.D. and H.W.; data curation, H.W.; writing—original draft preparation, H.W. and G.L.; writing—review and editing, H.W. and G.L.; visualization, H.Z.; supervision, H.Z.; project administration, H.Z.; funding acquisition, H.Z. All authors have read and agreed to the published version of the manuscript.

Data Availability Statement

Not applicable.

Conflicts of Interest

The authors declare no conflict of interest.

Publisher’s Note: MDPI stays neutral with regard to jurisdictional claims in published maps and institutional affiliations.

Figures and Tables

Figure 1. Topological diagram of new double full-bridge ZVZCS converter.

Figure 2. The first half period of duty cycle mode.

Figure 3. The second half period of duty cycle mode.

Figure 4. The first half period of phase shift mode.

Figure 5. The second half period of phase shift mode.

Figure 6. Small signal equivalent model of duty cycle mode.

Figure 7. Small signal equivalent model of phase shift mode.

Figure 8. Control strategy structure diagram for beam supply.

Figure 9. Voltage waveform diagram.

Figure 10. Voltage waveform diagram.

Figure 11. Output voltage waveform of load sudden change.

Figure 12. Output current waveform of load sudden change.

Figure 13. Experimental platform.

Figure 14. 2 kW experimental prototype.

Figure 15. Sudden-decreased load for the PI controller.

Figure 16. Sudden-decreased load for the LADRC controller.

Figure 17. Sudden-increased load for the PI controller.

Figure 18. Sudden-increased load for the LADRC controller.

Figure 19. Experimental results of double closed-loop PI controller switching from parallel to series mode.

Figure 20. Experimental results of LADRC controller switching from parallel to series mode.

Figure 21. Experimental results of double closed loop PI controller switching from series mode to parallel mode.

Figure 22. Experimental results of LADRC controller switching from series mode to parallel mode.

Figure 23. Soft switch waveform.

Figure 24. Efficiency test waveform.

Table 1

Parameters of Converter.

Symbol	Parameter	Value	Unit
Uin	DC input voltage	80–160	V
Uout	DC output voltage	0–1800	V
Iout	DC output current	<1.3	A
K	Transformer ratio	1/10	N/A
fs	Switching frequency	50	kHz
R	Load resistance	2000	Ω
Lf	Filtering inductance	250	μH
Cf	Filtering capacitor	30	μF
Lr	Resonant inductance	3	μH

Table 2

Technical Specifications of Converter.

Symbol	Parameter	Value	Unit
Uin	DC input voltage	80–160	V
Uout	DC output voltage	0–1800	V
Iout	DC output current	<1.3	A
P	Power	2000	W
fs	Switching frequency	50	kHz
Dmax	Maximum duty cycle	0.46	N/A
R	Load resistance	2000	Ω
U PP	Voltage ripple	<1	%
η	Efficiency	>95	%

Table 3

Component Parameters.

Symbol	Parameter	Value
K	Transformer ratio	1/10
T 1,2	Transformer core	ETD59
S 1–8	Inverter MOS tube	IXFH50N30Q3(300 V/50 A)
D 1–6	Rectifier diode	APT40DQ120(1200 V/40 A)
Lo	Filterg inductance	250 μH/PQ3230
Lr	Resonant inductance	3 μH/PQ3230
Co	Filter capacitor	30 μF/2200 V
Cb	DC isolating capacitor	4.4 μF/250 V

Table 4

Voltage and Current Stress of Semiconductor Devices.

Name	Voltage Stress	Current Stress
Inverter MOS tube	V in	1/10
Rectifier diode	Vo/D(max)	4.4 μF/250 V

Table 5

Statistical Table of Sudden Load Reduction Test Results.

Name	PI	LADRC	Improvement
Adjustment time/ms	38	20	18
Overshoot/V	39	20	19

Table 6

Statistical Table of Sudden Load Increase Test Results.

Name	PI	LADRC	Improvement
Adjustment time/ms	32.4	17	15.4
Overshoot/V	40	30	10

Table 7

Statistical Table of Experimental Data of Switching from Parallel Mode to Series Mode.

Name	PI	LADRC	Improvement
Setting time/ms	64.8	21	43.8
Jitter	Yes	No

Table 8

Statistical Table of Experimental Data of Switching from Series Mode to Parallel Mode.

Name	PI	LADRC	Improvement
Setting time/ms	78	74	4
Jitter	No	No

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