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Academic Editor:H.-C. Chen and Academic Editor:S. Gift
Electronics and Communication Engineering Department, NSIT, New Delhi, India
Received 11 November 2013; Accepted 24 December 2013; 9 February 2014
This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.
1. Introduction
Technology scaling and growing demand of portable electronic equipments have motivated the researchers towards the design of low voltage and low power analog signal processing circuits. Low supply voltage increases the battery lifetime and hence reduces the power consumption of the portable equipment. Various low-voltage lowpower design techniques reported in literatures include subthreshold MOSFETs, level shifters, self-cascode, bulk-driven, and FGMOS techniques [1-10]. Among these, FGMOS concept has gained prime importance due to its ability to reduce or remove the threshold voltage requirement of the circuit. Scaling of transistor dimensions has motivated the designers towards the design of low voltage nonlinear CMOS circuits. Voltage squarer is one of the most versatile nonlinear blocks that find application in several fields like neural and image signal processing [11-18]. It can be used to implement various nonlinear circuits such as multipliers, balanced modulators, and phase comparators. Analog hardware implementation of these blocks offers advantage of reduced silicon area and low power consumption. CMOS squarer circuit based on cross-coupled differential pair has been proposed in [11] but the circuit is complex and has large supply voltage requirement. Squarer with low supply voltage and high rejection of common-mode variations has been proposed in [12] and [13], respectively, but again these circuits require large number of transistors. Recently, the squarer topology using NMOS transistor has been proposed in [16] but it requires positive and negative bias voltage generator for threshold voltage cancellation and can process only single ended input signal. This paper presents very simple and new FGMOS based differential squarer which is the combination of the FGMOS based squarer proposed in [17] and differential voltage attenuator proposed in [18]. The proposed squarer can process differential signals and has low supply voltage, low power consumption, and low circuit complexity.
The operation of FGMOS transistor is described in Section 2. FGMOS based differential squarer is proposed and...