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Silicon densities, both for ASICs and FPGAs, can now support true systems-on-a-chip (SoCs). This level of design requires busing systems to connect various components, including 1 or more microprocessors, memory, peripherals, and special logic. AMBA, the Advanced Microprocessor Bus Architecture, is ARM's on-chip busing solution. Initially designed to support the ARM processor cores, AMBA is now licensed and deployed for use with other RISC cores. It's one of the leading on-chip busing systems. Competitors of AMBA include IBM's CoreConnect (www chips.ibm.com) and Silicore's Wishbone (www.silicore.net) bus systems.
A Multilevel System
AMBA defines a multilevel busing system, with a system bus and a lower-level peripheral bus. These include two system buses: the AMBA High-Speed Bus (AHB) or the Advanced System Bus (ASB), and the Advanced Peripheral Bus (APB). Designed for custom silicon, these provide standard bus protocols for connecting on-chip IP, custom logic, and specialized functions. These bus protocols are independent of the ARM processor and generalized for SoC application.
The system buses support 32-, 64-, and 128-bit data-bus implementations with a 32-bit address bus, as well as smaller byte and half-word designs. These are synchronous, nonmultiplexed buses that support bursting and pipelining, and in the more advanced version, a simple split transaction. The ASB is used for simpler, more cost-effective designs, whereas more sophisticated designs call for the employment of the AHB. Presently, ARM is working to enhance the AHB for more-effective MP operation.
The AMBA bus system defines a bus hierarchy of a system bus and a peripheral bus. The two buses are linked via a bridge that serves as the master to the peripheral bus slave de-vices. The system bus can be 1 of 2 defined buses: the newer AHB, the Advanced High-Speed Bus, or else the earlier ASB, the Advanced System Bus. The peripheral bus, called APB for the Advanced Peripheral Bus, is a...