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San Jose, Calif. - To bring some automation to handcrafted custom-IC design, Cadence Design Systems has announced Virtuoso Fastchip Design Solutions, a set of three IC-layout methodologies. Underlying those approaches is a new tool called Device Level Router (DLR), a redesigned version of Device Level Editor (DLE), and an enhanced version of Cadence's existing Layout Synthesis (LAS) tool.
All the tools are built on top of the Virtuoso Layout Editor, allowing users to drop back into handcrafted layout at any time. "The designer will continue to do anything he deems really critical by hand," said Willy Mason, Cadence Virtuoso product manager. "But for less critical things that may be a little more tedious, he can apply automation as he sees fit."
The new design methodologies are the Assisted Custom Layout flow, based on DLE and DLR; the Automated Custom Layout flow, based on LAS; and the Jumpstart flow, based on a combination of those three tools. The tools all have been tested in Cadence's...