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An FPGA module leverages the previous work from Goddard Space Flight Center (GSFC) relating to NASA's Space Telecommunications Radio System (STRS) project. The STRS SpaceWire FPGA Module is written in the Verflog Register Transfer Level (RTL) language, and it encapsulates an unmodified GSFC core (which is written in VHDL) . The module has the necessary inputs/outputs (I/Os) and parameters to integrate seamlessly with the SPARC I/O FPGA Interface module...
